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Revise r220046 by introducing dc_netcfg_wait() which waits the end
of active DMA cycle. dc_setcfg() also has to wait until the DMA engine is stopped so using a common function to handle the job is better than duplicating the code. No objection from: marius
This commit is contained in:
parent
c45e1b3cad
commit
1da7683a7c
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=220106
1 changed files with 39 additions and 51 deletions
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@ -279,6 +279,7 @@ static void dc_miibus_statchg(device_t);
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static void dc_miibus_mediainit(device_t);
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static void dc_setcfg(struct dc_softc *, int);
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static void dc_netcfg_wait(struct dc_softc *);
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static uint32_t dc_mchash_le(struct dc_softc *, const uint8_t *);
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static uint32_t dc_mchash_be(const uint8_t *);
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static void dc_setfilt_21143(struct dc_softc *);
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@ -1370,6 +1371,32 @@ dc_setfilt(struct dc_softc *sc)
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dc_setfilt_xircom(sc);
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}
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static void
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dc_netcfg_wait(struct dc_softc *sc)
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{
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uint32_t isr;
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int i;
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for (i = 0; i < DC_TIMEOUT; i++) {
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isr = CSR_READ_4(sc, DC_ISR);
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if (isr & DC_ISR_TX_IDLE &&
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((isr & DC_ISR_RX_STATE) == DC_RXSTATE_STOPPED ||
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(isr & DC_ISR_RX_STATE) == DC_RXSTATE_WAIT))
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break;
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DELAY(10);
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}
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if (i == DC_TIMEOUT) {
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if (!(isr & DC_ISR_TX_IDLE) && !DC_IS_ASIX(sc))
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device_printf(sc->dc_dev,
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"%s: failed to force tx to idle state\n", __func__);
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if (!((isr & DC_ISR_RX_STATE) == DC_RXSTATE_STOPPED ||
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(isr & DC_ISR_RX_STATE) == DC_RXSTATE_WAIT) &&
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!DC_HAS_BROKEN_RXSTATE(sc))
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device_printf(sc->dc_dev,
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"%s: failed to force rx to idle state\n", __func__);
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}
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}
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/*
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* In order to fiddle with the 'full-duplex' and '100Mbps' bits in
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* the netconfig register, we first have to put the transmit and/or
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@ -1378,8 +1405,7 @@ dc_setfilt(struct dc_softc *sc)
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static void
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dc_setcfg(struct dc_softc *sc, int media)
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{
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int i, restart = 0, watchdogreg;
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uint32_t isr;
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int restart = 0, watchdogreg;
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if (IFM_SUBTYPE(media) == IFM_NONE)
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return;
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@ -1387,28 +1413,7 @@ dc_setcfg(struct dc_softc *sc, int media)
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if (CSR_READ_4(sc, DC_NETCFG) & (DC_NETCFG_TX_ON | DC_NETCFG_RX_ON)) {
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restart = 1;
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DC_CLRBIT(sc, DC_NETCFG, (DC_NETCFG_TX_ON | DC_NETCFG_RX_ON));
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for (i = 0; i < DC_TIMEOUT; i++) {
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isr = CSR_READ_4(sc, DC_ISR);
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if (isr & DC_ISR_TX_IDLE &&
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((isr & DC_ISR_RX_STATE) == DC_RXSTATE_STOPPED ||
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(isr & DC_ISR_RX_STATE) == DC_RXSTATE_WAIT))
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break;
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DELAY(10);
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}
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if (i == DC_TIMEOUT) {
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if (!(isr & DC_ISR_TX_IDLE) && !DC_IS_ASIX(sc))
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device_printf(sc->dc_dev,
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"%s: failed to force tx to idle state\n",
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__func__);
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if (!((isr & DC_ISR_RX_STATE) == DC_RXSTATE_STOPPED ||
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(isr & DC_ISR_RX_STATE) == DC_RXSTATE_WAIT) &&
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!DC_HAS_BROKEN_RXSTATE(sc))
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device_printf(sc->dc_dev,
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"%s: failed to force rx to idle state\n",
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__func__);
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}
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dc_netcfg_wait(sc);
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}
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if (IFM_SUBTYPE(media) == IFM_100_TX) {
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@ -3917,7 +3922,7 @@ dc_stop(struct dc_softc *sc)
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struct dc_list_data *ld;
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struct dc_chain_data *cd;
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int i;
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uint32_t ctl, isr;
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uint32_t ctl, netcfg;
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DC_LOCK_ASSERT(sc);
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@ -3928,38 +3933,21 @@ dc_stop(struct dc_softc *sc)
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callout_stop(&sc->dc_stat_ch);
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callout_stop(&sc->dc_wdog_ch);
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sc->dc_wdog_timer = 0;
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sc->dc_link = 0;
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ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
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DC_CLRBIT(sc, DC_NETCFG, (DC_NETCFG_RX_ON | DC_NETCFG_TX_ON));
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for (i = 0; i < DC_TIMEOUT; i++) {
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isr = CSR_READ_4(sc, DC_ISR);
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if ((isr & DC_ISR_TX_IDLE ||
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(isr & DC_ISR_TX_STATE) == DC_TXSTATE_RESET) &&
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(isr & DC_ISR_RX_STATE) == DC_RXSTATE_STOPPED)
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break;
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DELAY(10);
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}
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if (i == DC_TIMEOUT) {
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if (!((isr & DC_ISR_TX_IDLE) ||
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(isr & DC_ISR_TX_STATE) == DC_TXSTATE_RESET) &&
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!DC_IS_ASIX(sc) && !DC_IS_DAVICOM(sc))
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device_printf(sc->dc_dev,
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"%s: failed to force tx to idle state\n",
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__func__);
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if (!((isr & DC_ISR_RX_STATE) == DC_RXSTATE_STOPPED) &&
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!DC_HAS_BROKEN_RXSTATE(sc))
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device_printf(sc->dc_dev,
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"%s: failed to force rx to idle state\n",
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__func__);
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}
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netcfg = CSR_READ_4(sc, DC_NETCFG);
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if (netcfg & (DC_NETCFG_RX_ON | DC_NETCFG_TX_ON))
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CSR_WRITE_4(sc, DC_NETCFG,
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netcfg & ~(DC_NETCFG_RX_ON | DC_NETCFG_TX_ON));
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CSR_WRITE_4(sc, DC_IMR, 0x00000000);
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/* Wait the completion of TX/RX SM. */
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if (netcfg & (DC_NETCFG_RX_ON | DC_NETCFG_TX_ON))
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dc_netcfg_wait(sc);
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CSR_WRITE_4(sc, DC_TXADDR, 0x00000000);
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CSR_WRITE_4(sc, DC_RXADDR, 0x00000000);
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sc->dc_link = 0;
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/*
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* Free data in the RX lists.
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