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i2c: Add Microcrystal RV3032 RTC driver
This is a simple RTC driver for the rv3032 from Microcrystal. Just the basic functionality is implemented (no timer, alarm etc ..). Sponsored by: Beckhoff Automation GmbH & Co. KG Differential Revision: https://reviews.freebsd.org/D41995
This commit is contained in:
Emmanuel Vadot
parent
137b58e4d2
commit
1d6a6a5244
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@ -1825,6 +1825,7 @@ dev/iicbus/rtc/isl12xx.c optional isl12xx
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dev/iicbus/rtc/nxprtc.c optional nxprtc | pcf8563
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dev/iicbus/rtc/pcf85063.c optional pcf85063 iicbus fdt
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dev/iicbus/rtc/rtc8583.c optional rtc8583
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dev/iicbus/rtc/rv3032.c optional rv3032 iicbus fdt
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dev/iicbus/rtc/rx8803.c optional rx8803 iicbus fdt
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dev/iicbus/rtc/s35390a.c optional s35390a
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dev/iicbus/sensor/htu21.c optional htu21
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455
sys/dev/iicbus/rtc/rv3032.c
Normal file
455
sys/dev/iicbus/rtc/rv3032.c
Normal file
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@ -0,0 +1,455 @@
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/*-
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2023 Beckhoff Automation GmbH & Co. KG
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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#include "opt_platform.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/clock.h>
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#include <sys/kernel.h>
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#include <sys/lock.h>
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#include <sys/module.h>
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#include <sys/sysctl.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dev/iicbus/iiconf.h>
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#include <dev/iicbus/iicbus.h>
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#include "clock_if.h"
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#include "iicbus_if.h"
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/* Date registers */
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#define RV3032_SECS_100TH 0x00
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#define RV3032_SECS 0x01
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#define RV3032_MINS 0x02
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#define RV3032_HOURS 0x03
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#define RV3032_WEEKDAY 0x04
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#define RV3032_DATE 0x05
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#define RV3032_MONTH 0x06
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#define RV3032_YEAR 0x07
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/* Alarm registers */
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#define RV3032_ALARM_MINUTES 0x08
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#define RV3032_ALARM_HOURS 0x09
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#define RV3032_ALARM_DATE 0x0A
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/* Periodic countdown timer registers */
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#define RV3032_TIMER_VALUE0 0x0B
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#define RV3032_TIMER_VALUE1 0x0C
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/* Status register */
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#define RV3032_STATUS 0x0D
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#define RV3032_STATUS_VLF (1 << 0) /* Voltage Low Flag */
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#define RV3032_STATUS_PORF (1 << 1) /* Power On Reset Flag */
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#define RV3032_STATUS_EVF (1 << 2) /* External eVent Flag */
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#define RV3032_STATUS_AF (1 << 3) /* Alarm Flag */
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#define RV3032_STATUS_TF (1 << 4) /* periodic countdown Timer Flag */
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#define RV3032_STATUS_UF (1 << 5) /* periodic time Update Flag */
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#define RV3032_STATUS_TLF (1 << 6) /* Temperature Low Flag */
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#define RV3032_STATUS_THF (1 << 7) /* Temperature High Flag */
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/* Temperature registers */
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#define RV3032_TEMP_LSB 0x0E
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#define RV3032_TEMP_LSB_BSF (1 << 0)
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#define RV3032_TEMP_LSB_CLKF (1 << 1)
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#define RV3032_TEMP_LSB_EEBUSY (1 << 2)
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#define RV3032_TEMP_LSB_EEF (1 << 3)
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#define RV3032_TEMP_LSB_MASK (0xF0)
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#define RV3032_TEMP_LSB_SHIFT 4
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#define RV3032_TEMP_MSB 0x0F
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#define TEMP_DIV 16
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#define TEMP_C_TO_K 273
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/* Control registers */
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#define RV3032_CTRL1 0x10
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#define RV3032_CTRL1_TD_MASK 0x3 /* Timer clock frequency */
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#define RV3032_CTRL1_TD_SHIFT 0
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#define RV3032_CTRL1_TD_4096 0
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#define RV3032_CTRL1_TD_64 1
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#define RV3032_CTRL1_TD_1 2
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#define RV3032_CTRL1_TD_1_60 3
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#define RV3032_CTRL1_EERD (1 << 2) /* EEPROM memory refresh disable bit */
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#define RV3032_CTRL1_TE (1 << 3) /* Periodic countdown timer enable bit */
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#define RV3032_CTRL1_USEL (1 << 4) /* Update interrupt select bit */
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#define RV3032_CTRL1_GP0 (1 << 5) /* General Purpose bit 0 */
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#define RV3032_CTRL2 0x11
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#define RV3032_CTRL2_STOP (1 << 0) /* Stop bit */
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#define RV3032_CTRL2_GP1 (1 << 1) /* General Purpose bit 1 */
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#define RV3032_CTRL2_EIE (1 << 2) /* External event interrupt enable bit */
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#define RV3032_CTRL2_AIE (1 << 3) /* Alarm interrupt enable bit */
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#define RV3032_CTRL2_TIE (1 << 4) /* Periodic countdown timer interrupt enable bit */
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#define RV3032_CTRL2_UIE (1 << 5) /* Periodic time update interrupt enable bit */
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#define RV3032_CTRL2_CLKIE (1 << 6) /* Interrupt Controlled Clock Output Enable bit */
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#define RV3032_CTRL3 0x12
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#define RV3032_CTRL3_TLIE (1 << 0) /* Temperature Low Interrupt Enable bit */
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#define RV3032_CTRL3_THIE (1 << 1) /* Temperature High Interrupt Enable bit */
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#define RV3032_CTRL3_TLE (1 << 2) /* Temperature Low Enable bit */
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#define RV3032_CTRL3_THE (1 << 3) /* Temperature High Enable bit */
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#define RV3032_CTRL3_BSIE (1 << 4) /* Backup Switchover Interrupt Enable bit */
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/* EEPROM registers */
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#define RV3032_EEPROM_ADDRESS 0x3D
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#define RV3032_EEPROM_DATA 0x3E
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#define RV3032_EEPROM_COMMAND 0x3F
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#define RV3032_EEPROM_CMD_UPDATE 0x11
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#define RV3032_EEPROM_CMD_REFRESH 0x12
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#define RV3032_EEPROM_CMD_WRITE_ONE 0x21
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#define RV3032_EEPROM_CMD_READ_ONE 0x22
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/* PMU register */
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#define RV3032_EEPROM_PMU 0xC0
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#define RV3032_PMU_TCM_MASK 0x3
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#define RV3032_PMU_TCM_SHIFT 0
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#define RV3032_PMU_TCM_OFF 0
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#define RV3032_PMU_TCM_175V 1
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#define RV3032_PMU_TCM_30V 2
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#define RV3032_PMU_TCM_45V 3
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#define RV3032_PMU_TCR_MASK 0x3
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#define RV3032_PMU_TCR_SHIFT 2
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#define RV3032_PMU_TCR_06K 0
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#define RV3032_PMU_TCR_2K 1
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#define RV3032_PMU_TCR_7K 2
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#define RV3032_PMU_TCR_12K 3
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#define RV3032_PMU_BSM_MASK 0x3
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#define RV3032_PMU_BSM_SHIFT 4
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#define RV3032_PMU_BSM_OFF 0
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#define RV3032_PMU_BSM_DSM 1
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#define RV3032_PMU_BSM_LSM 2
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#define RV3032_PMU_BSM_OFF2 3
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#define RV3032_PMU_NCLKE (1 << 6)
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struct rv3032_softc {
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device_t dev;
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device_t busdev;
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struct intr_config_hook init_hook;
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};
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struct rv3032_timeregs {
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uint8_t secs;
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uint8_t mins;
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uint8_t hours;
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uint8_t weekday;
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uint8_t date;
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uint8_t month;
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uint8_t year;
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};
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static struct ofw_compat_data compat_data[] = {
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{"microcrystal,rv3032", 1},
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{NULL, 0},
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};
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static int
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rv3032_update_register(struct rv3032_softc *sc, uint8_t reg, uint8_t value, uint8_t mask)
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{
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int rv;
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uint8_t data;
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if ((rv = iicdev_readfrom(sc->dev, reg, &data, 1, IIC_WAIT)) != 0)
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return (rv);
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data &= mask;
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data |= value;
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if ((rv = iicdev_writeto(sc->dev, reg, &data, 1, IIC_WAIT)) != 0)
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return (rv);
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return (0);
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}
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static int
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rv3032_eeprom_wait(struct rv3032_softc *sc)
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{
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int rv, timeout;
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uint8_t data;
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for (timeout = 1000; timeout > 0; timeout--) {
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if ((rv = iicdev_readfrom(sc->dev, RV3032_TEMP_LSB, &data, sizeof(data), IIC_WAIT)) != 0)
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return (rv);
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if ((data & RV3032_TEMP_LSB_EEBUSY) == 0) {
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break;
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}
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}
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if (timeout == 0) {
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device_printf(sc->dev, "Timeout updating the eeprom\n");
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return (ETIMEDOUT);
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}
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/* Wait 1ms before allowing another eeprom access */
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DELAY(1000);
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return (0);
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}
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static int
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rv3032_eeprom_disable(struct rv3032_softc *sc)
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{
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int rv;
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if ((rv = rv3032_update_register(sc, RV3032_CTRL1, RV3032_CTRL1_EERD, ~RV3032_CTRL1_EERD)) != 0)
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return (rv);
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/* Wait 1ms before checking EBUSY */
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DELAY(1000);
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return (rv3032_eeprom_wait(sc));
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}
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static int
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rv3032_eeprom_update(struct rv3032_softc *sc)
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{
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int rv;
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uint8_t data;
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data = RV3032_EEPROM_CMD_UPDATE;
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if ((rv = iicdev_writeto(sc->dev, RV3032_EEPROM_COMMAND, &data, sizeof(data), IIC_WAIT)) != 0)
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return (rv);
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/* Wait 1ms before checking EBUSY */
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DELAY(1000);
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return (rv3032_eeprom_wait(sc));
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}
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static int
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rv3032_eeprom_enable(struct rv3032_softc *sc)
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{
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int rv;
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/* Restore eeprom refresh */
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if ((rv = rv3032_update_register(sc, RV3032_CTRL1, 0, ~RV3032_CTRL1_EERD)) != 0)
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return (rv);
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DELAY(1000);
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return (0);
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}
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static int
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rv3032_update_cfg(struct rv3032_softc *sc)
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{
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int rv;
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if ((rv = rv3032_eeprom_disable(sc)) != 0)
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return (rv);
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/* Save configuration in eeprom and re-enable it */
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if ((rv = rv3032_eeprom_update(sc)) != 0)
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return (rv);
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return (rv3032_eeprom_enable(sc));
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}
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static int
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rv3032_temp_read(struct rv3032_softc *sc, int *temp)
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{
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int rv, temp2;
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uint8_t data[2];
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if ((rv = iicdev_readfrom(sc->dev, RV3032_TEMP_LSB, &data, sizeof(data), IIC_WAIT)) != 0)
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return (rv);
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/* Wait for temp to be stable */
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*temp = (((data[0] & RV3032_TEMP_LSB_MASK) >> RV3032_TEMP_LSB_SHIFT) |
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(data[1] << RV3032_TEMP_LSB_SHIFT));
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do {
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temp2 = *temp;
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*temp = (((data[0] & RV3032_TEMP_LSB_MASK) >> RV3032_TEMP_LSB_SHIFT) |
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(data[1] << RV3032_TEMP_LSB_SHIFT));
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} while (temp2 != *temp);
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*temp = (*temp / TEMP_DIV) + TEMP_C_TO_K;
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return (0);
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}
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static int
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rv3032_temp_sysctl(SYSCTL_HANDLER_ARGS)
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{
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int error, temp;
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struct rv3032_softc *sc;
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sc = (struct rv3032_softc *)arg1;
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if (rv3032_temp_read(sc, &temp) != 0)
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return (EIO);
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error = sysctl_handle_int(oidp, &temp, 0, req);
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return (error);
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}
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static void
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rv3032_init(void *arg)
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{
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struct rv3032_softc *sc;
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struct sysctl_ctx_list *ctx;
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struct sysctl_oid *tree_node;
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struct sysctl_oid_list *tree;
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int rv;
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sc = (struct rv3032_softc*)arg;
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config_intrhook_disestablish(&sc->init_hook);
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/* Set direct switching mode */
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rv3032_update_register(sc,
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RV3032_EEPROM_PMU,
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RV3032_PMU_BSM_DSM << RV3032_PMU_BSM_SHIFT,
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RV3032_PMU_BSM_MASK);
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if ((rv = rv3032_update_cfg(sc)) != 0) {
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device_printf(sc->dev, "Cannot set to DSM mode (%d)\n", rv);
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return;
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}
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/* Register as clock source */
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clock_register_flags(sc->dev, 1000000, CLOCKF_SETTIME_NO_ADJ);
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clock_schedule(sc->dev, 1);
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ctx = device_get_sysctl_ctx(sc->dev);
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tree_node = device_get_sysctl_tree(sc->dev);
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tree = SYSCTL_CHILDREN(tree_node);
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SYSCTL_ADD_PROC(ctx, tree, OID_AUTO, "temperature",
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CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MPSAFE, sc, 0,
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rv3032_temp_sysctl, "IK0", "Current temperature");
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return;
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}
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static int
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rv3032_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (ofw_bus_search_compatible(dev, compat_data)->ocd_data != 0) {
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device_set_desc(dev, "Microcrystal RV3032");
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return (BUS_PROBE_DEFAULT);
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}
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return (ENXIO);
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}
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static int
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rv3032_attach(device_t dev)
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{
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struct rv3032_softc *sc;
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sc = device_get_softc(dev);
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sc->dev = dev;
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sc->busdev = device_get_parent(sc->dev);
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sc->init_hook.ich_func = rv3032_init;
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sc->init_hook.ich_arg = sc;
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if (config_intrhook_establish(&sc->init_hook) != 0)
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return (ENOMEM);
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return (0);
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}
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static int
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rv3032_detach(device_t dev)
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{
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clock_unregister(dev);
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return (0);
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}
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static int
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rv3032_gettime(device_t dev, struct timespec *ts)
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{
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struct rv3032_softc *sc;
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struct rv3032_timeregs time_regs;
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struct clocktime ct;
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uint8_t status;
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int rv;
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sc = device_get_softc(dev);
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if ((rv = iicdev_readfrom(sc->dev, RV3032_STATUS, &status, sizeof(status), IIC_WAIT)) != 0)
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return (rv);
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if (status & (RV3032_STATUS_PORF | RV3032_STATUS_VLF))
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return (EINVAL);
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if ((rv = iicdev_readfrom(sc->dev, RV3032_SECS, &time_regs, sizeof(time_regs), IIC_WAIT)) != 0)
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return (rv);
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bzero(&ct, sizeof(ct));
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ct.sec = FROMBCD(time_regs.secs & 0x7f);
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ct.min = FROMBCD(time_regs.mins & 0x7f);
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ct.hour = FROMBCD(time_regs.hours & 0x3f);
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ct.day = FROMBCD(time_regs.date & 0x3f);
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ct.mon = FROMBCD(time_regs.month & 0x1f) - 1;
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ct.year = FROMBCD(time_regs.year) + 2000;
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return (clock_ct_to_ts(&ct, ts));
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}
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static int
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rv3032_settime(device_t dev, struct timespec *ts)
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{
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struct rv3032_softc *sc;
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struct rv3032_timeregs time_regs;
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struct clocktime ct;
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uint8_t status;
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int rv;
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sc = device_get_softc(dev);
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if ((rv = iicdev_readfrom(sc->dev, RV3032_STATUS, &status, sizeof(status), IIC_WAIT)) != 0)
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return (rv);
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clock_ts_to_ct(ts, &ct);
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|
||||
time_regs.secs = TOBCD(ct.sec);
|
||||
time_regs.mins = TOBCD(ct.min);
|
||||
time_regs.hours = TOBCD(ct.hour);
|
||||
time_regs.date = TOBCD(ct.day);
|
||||
time_regs.month = TOBCD(ct.mon + 1);
|
||||
time_regs.year = TOBCD(ct.year - 2000);
|
||||
|
||||
if ((rv = iicdev_writeto(sc->dev, RV3032_SECS, &time_regs, sizeof(time_regs), IIC_WAIT)) != 0)
|
||||
return (rv);
|
||||
|
||||
/* Force a power on reset event so rv3032 reload the registers */
|
||||
status &= ~(RV3032_STATUS_PORF | RV3032_STATUS_VLF);
|
||||
if ((rv = iicdev_writeto(sc->dev, RV3032_STATUS, &status, sizeof(status), IIC_WAIT)) != 0)
|
||||
return (rv);
|
||||
return (0);
|
||||
}
|
||||
|
||||
static device_method_t rv3032_methods[] = {
|
||||
/* device_if methods */
|
||||
DEVMETHOD(device_probe, rv3032_probe),
|
||||
DEVMETHOD(device_attach, rv3032_attach),
|
||||
DEVMETHOD(device_detach, rv3032_detach),
|
||||
|
||||
/* clock_if methods */
|
||||
DEVMETHOD(clock_gettime, rv3032_gettime),
|
||||
DEVMETHOD(clock_settime, rv3032_settime),
|
||||
|
||||
DEVMETHOD_END,
|
||||
};
|
||||
|
||||
static driver_t rv3032_driver = {
|
||||
"rv3032",
|
||||
rv3032_methods,
|
||||
sizeof(struct rv3032_softc),
|
||||
};
|
||||
|
||||
DRIVER_MODULE(rv3032, iicbus, rv3032_driver, NULL, NULL);
|
||||
MODULE_VERSION(rv3032, 1);
|
||||
MODULE_DEPEND(rv3032, iicbus, IICBUS_MINVER, IICBUS_PREFVER, IICBUS_MAXVER);
|
||||
IICBUS_FDT_PNP_INFO(compat_data);
|
||||
|
|
@ -28,7 +28,8 @@ SUBDIR = \
|
|||
smbus \
|
||||
|
||||
.if !empty(OPT_FDT)
|
||||
SUBDIR += rx8803 \
|
||||
SUBDIR += rv3032 \
|
||||
rx8803 \
|
||||
tca64xx \
|
||||
tmp461
|
||||
.endif
|
||||
|
|
|
|||
13
sys/modules/i2c/rv3032/Makefile
Normal file
13
sys/modules/i2c/rv3032/Makefile
Normal file
|
|
@ -0,0 +1,13 @@
|
|||
|
||||
.PATH: ${SRCTOP}/sys/dev/iicbus/rtc
|
||||
KMOD= rv3032
|
||||
SRCS= rv3032.c
|
||||
|
||||
SRCS+= bus_if.h \
|
||||
clock_if.h \
|
||||
device_if.h \
|
||||
iicbus_if.h \
|
||||
opt_platform.h \
|
||||
ofw_bus_if.h
|
||||
|
||||
.include <bsd.kmod.mk>
|
||||
Loading…
Reference in a new issue