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bhyve: Implement MSR_MISC_FEATURES_ENABLES

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Linux reads MISC_FEATURES_ENABLES to manage the CPUID faulting feature
(undocumented in the Intel SDM, but documented in 323850-004 (Intel
Virtualization Technology FlexMigration Application Note). Since bhyve
doesn't emulate this feature, we always return 0. Neither does bhyve
support the MONITOR/MWAIT fault bit also in this MSR (which is
documented in the sdm), so always return 0.

Sponsored by:		Netflix
Reviewed by:		jhb
Differential Revision:	https://reviews.freebsd.org/D36602
This commit is contained in:
Warner Losh 2022-10-27 11:32:18 -06:00
parent 172be8642d
commit 1d21f64149
2 changed files with 2 additions and 0 deletions
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1
sys/x86/include/specialreg.h
View file

@ -559,6 +559,7 @@
#define MSR_BBL_CR_CTL3 0x11e
#define MSR_IA32_TSX_CTRL 0x122
#define MSR_IA32_MCU_OPT_CTRL 0x123
#define MSR_MISC_FEATURE_ENABLES 0x140
#define MSR_SYSENTER_CS_MSR 0x174
#define MSR_SYSENTER_ESP_MSR 0x175
#define MSR_SYSENTER_EIP_MSR 0x176

1
usr.sbin/bhyve/xmsr.c
View file

@ -117,6 +117,7 @@ emulate_rdmsr(struct vmctx *ctx __unused, int vcpu __unused, uint32_t num,
case MSR_PP0_ENERGY_STATUS:
case MSR_PP1_ENERGY_STATUS:
case MSR_DRAM_ENERGY_STATUS:
case MSR_MISC_FEATURE_ENABLES:
*val = 0;
break;
case MSR_RAPL_POWER_UNIT: