Add event name aliases for Pentium PMCs.

This commit is contained in:
Joseph Koshy 2008-09-17 03:53:37 +00:00
parent 3daba5a642
commit 0b9b757d45
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=183105
2 changed files with 23 additions and 1 deletions

View file

@ -1291,7 +1291,14 @@ p4_allocate_pmc(enum pmc_event pe, char *ctrspec,
*/
static struct pmc_event_alias p5_aliases[] = {
EV_ALIAS("cycles", "tsc"),
EV_ALIAS("branches", "p5-taken-branches"),
EV_ALIAS("cycles", "tsc"),
EV_ALIAS("dc-misses", "p5-data-read-miss-or-write-miss"),
EV_ALIAS("ic-misses", "p5-code-cache-miss"),
EV_ALIAS("instructions", "p5-instructions-executed"),
EV_ALIAS("interrupts", "p5-hardware-interrupts"),
EV_ALIAS("unhalted-cycles",
"p5-number-of-cycles-not-in-halt-state"),
EV_ALIAS(NULL, NULL)
};

View file

@ -380,6 +380,21 @@ The number of writes to non-cacheable memory, including write cycles
caused by TLB misses and I/O writes.
This event is only allocated on counter 1.
.El
.Ss Event Name Aliases
The following table shows the mapping between the PMC-independent
aliases supported by
.Lb libpmc
and the underlying hardware events used.
.Bl -column "branch-mispredicts" "Description"
.It Em Alias Ta Em Event
.It Li branches Ta Li p5-taken-branches
.It Li branch-mispredicts Ta Li (unsupported)
.It Li dc-misses Ta Li p5-data-read-miss-or-write-miss
.It Li ic-misses Ta Li p5-code-cache-miss
.It Li instructions Ta Li p5-instructions-executed
.It Li interrupts Ta Li p5-hardware-interrupts
.It Li unhalted-cycles Ta Li p5-number-of-cycles-not-in-halt-state
.El
.Sh SEE ALSO
.Xr pmc 3 ,
.Xr pmc.k7 3 ,