Yet another bug fix/optimization for the Davicom DM9100/9102: increase

the PCI latency timer value to 0x80. Davicom's Linux driver does this,
and it drastically reduces the number of TX underruns in my tests. (Note:
this is done only for the Davicom chips. I'm not sure it's a good idea to
do it for all of them.)

Again, still waiting on confirmation before merging to stable.
This commit is contained in:
Bill Paul 2000-10-27 00:15:04 +00:00
parent 7dbdc1bff4
commit 0a46b1dccc
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=67668
2 changed files with 10 additions and 0 deletions

View file

@ -1836,6 +1836,11 @@ static int dc_attach(dev)
sc->dc_flags |= DC_TX_COALESCE|DC_TX_INTR_ALWAYS; sc->dc_flags |= DC_TX_COALESCE|DC_TX_INTR_ALWAYS;
sc->dc_flags |= DC_REDUCED_MII_POLL|DC_TX_STORENFWD; sc->dc_flags |= DC_REDUCED_MII_POLL|DC_TX_STORENFWD;
sc->dc_pmode = DC_PMODE_MII; sc->dc_pmode = DC_PMODE_MII;
/* Increase the latency timer value. */
command = pci_read_config(dev, DC_PCI_CFLT, 4);
command &= 0xFFFF00FF;
command |= 0x00008000;
pci_write_config(dev, DC_PCI_CFLT, command, 4);
break; break;
case DC_DEVICEID_AL981: case DC_DEVICEID_AL981:
sc->dc_type = DC_TYPE_AL981; sc->dc_type = DC_TYPE_AL981;

View file

@ -1836,6 +1836,11 @@ static int dc_attach(dev)
sc->dc_flags |= DC_TX_COALESCE|DC_TX_INTR_ALWAYS; sc->dc_flags |= DC_TX_COALESCE|DC_TX_INTR_ALWAYS;
sc->dc_flags |= DC_REDUCED_MII_POLL|DC_TX_STORENFWD; sc->dc_flags |= DC_REDUCED_MII_POLL|DC_TX_STORENFWD;
sc->dc_pmode = DC_PMODE_MII; sc->dc_pmode = DC_PMODE_MII;
/* Increase the latency timer value. */
command = pci_read_config(dev, DC_PCI_CFLT, 4);
command &= 0xFFFF00FF;
command |= 0x00008000;
pci_write_config(dev, DC_PCI_CFLT, command, 4);
break; break;
case DC_DEVICEID_AL981: case DC_DEVICEID_AL981:
sc->dc_type = DC_TYPE_AL981; sc->dc_type = DC_TYPE_AL981;