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Yet another bug fix/optimization for the Davicom DM9100/9102: increase
the PCI latency timer value to 0x80. Davicom's Linux driver does this, and it drastically reduces the number of TX underruns in my tests. (Note: this is done only for the Davicom chips. I'm not sure it's a good idea to do it for all of them.) Again, still waiting on confirmation before merging to stable.
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parent
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commit
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Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=67668
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@ -1836,6 +1836,11 @@ static int dc_attach(dev)
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sc->dc_flags |= DC_TX_COALESCE|DC_TX_INTR_ALWAYS;
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sc->dc_flags |= DC_TX_COALESCE|DC_TX_INTR_ALWAYS;
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sc->dc_flags |= DC_REDUCED_MII_POLL|DC_TX_STORENFWD;
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sc->dc_flags |= DC_REDUCED_MII_POLL|DC_TX_STORENFWD;
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sc->dc_pmode = DC_PMODE_MII;
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sc->dc_pmode = DC_PMODE_MII;
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/* Increase the latency timer value. */
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command = pci_read_config(dev, DC_PCI_CFLT, 4);
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command &= 0xFFFF00FF;
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command |= 0x00008000;
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pci_write_config(dev, DC_PCI_CFLT, command, 4);
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break;
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break;
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case DC_DEVICEID_AL981:
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case DC_DEVICEID_AL981:
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sc->dc_type = DC_TYPE_AL981;
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sc->dc_type = DC_TYPE_AL981;
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@ -1836,6 +1836,11 @@ static int dc_attach(dev)
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sc->dc_flags |= DC_TX_COALESCE|DC_TX_INTR_ALWAYS;
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sc->dc_flags |= DC_TX_COALESCE|DC_TX_INTR_ALWAYS;
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sc->dc_flags |= DC_REDUCED_MII_POLL|DC_TX_STORENFWD;
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sc->dc_flags |= DC_REDUCED_MII_POLL|DC_TX_STORENFWD;
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sc->dc_pmode = DC_PMODE_MII;
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sc->dc_pmode = DC_PMODE_MII;
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/* Increase the latency timer value. */
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command = pci_read_config(dev, DC_PCI_CFLT, 4);
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command &= 0xFFFF00FF;
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command |= 0x00008000;
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pci_write_config(dev, DC_PCI_CFLT, command, 4);
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break;
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break;
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case DC_DEVICEID_AL981:
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case DC_DEVICEID_AL981:
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sc->dc_type = DC_TYPE_AL981;
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sc->dc_type = DC_TYPE_AL981;
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