FCP-101: Remove ed(4).

Relnotes:	yes
FCP:		https://github.com/freebsd/fcp/blob/master/fcp-0101.md
Reviewed by:	jhb, imp
Differential Revision:	https://reviews.freebsd.org/D20230
This commit is contained in:
Brooks Davis 2019-05-17 15:23:02 +00:00
parent 08ac01a92c
commit 05aa6e583b
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=347911
25 changed files with 2 additions and 7689 deletions

View file

@ -43,6 +43,8 @@ OLD_FILES+=usr/share/man/man4/bm.4
OLD_FILES+=usr/share/man/man4/cs.4
OLD_FILES+=usr/share/man/man4/de.4
OLD_FILES+=usr/share/man/man4/if_de.4
OLD_FILES+=usr/share/man/man4/ed.4
OLD_FILES+=usr/share/man/man4/if_ed.4
# 20190513: libcap_sysctl interface change
OLD_FILES+=lib/casper/libcap_sysctl.1
# 20190509: tests/sys/opencrypto requires the net/py-dpkt package.

View file

@ -136,7 +136,6 @@ MAN= aac.4 \
ds3231.4 \
${_dtrace_provs} \
dummynet.4 \
ed.4 \
edsc.4 \
ehci.4 \
em.4 \
@ -627,7 +626,6 @@ MLINKS+=cxgbev.4 if_cxgbev.4 \
cxgbev.4 if_ccv.4
MLINKS+=dc.4 if_dc.4
MLINKS+=disc.4 if_disc.4
MLINKS+=ed.4 if_ed.4
MLINKS+=edsc.4 if_edsc.4
MLINKS+=em.4 if_em.4
MLINKS+=enc.4 if_enc.4

View file

@ -1,407 +0,0 @@
.\"
.\" Copyright (c) 1994, David Greenman
.\" All rights reserved.
.\"
.\" Redistribution and use in source and binary forms, with or without
.\" modification, are permitted provided that the following conditions
.\" are met:
.\" 1. Redistributions of source code must retain the above copyright
.\" notice, this list of conditions and the following disclaimer.
.\" 2. Redistributions in binary form must reproduce the above copyright
.\" notice, this list of conditions and the following disclaimer in the
.\" documentation and/or other materials provided with the distribution.
.\" 3. All advertising materials mentioning features or use of this software
.\" must display the following acknowledgement:
.\" This product includes software developed by David Greenman.
.\" 4. The name of the author may not be used to endorse or promote products
.\" derived from this software without specific prior written permission.
.\"
.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
.\" SUCH DAMAGE.
.\"
.\" $FreeBSD$
.\"
.Dd October 24, 2018
.Dt ED 4
.Os
.Sh NAME
.Nm ed
.Nd "NE-2000 and WD-80x3 Ethernet driver"
.Sh SYNOPSIS
To compile this driver into the kernel,
place the following lines in your
kernel configuration file:
.Bd -ragged -offset indent
.Cd "device miibus"
.Cd "device ed"
.Ed
.Pp
Alternatively, to load the driver as a
module at boot time, place the following line in
.Xr loader.conf 5 :
.Bd -literal -offset indent
if_ed_load="YES"
.Ed
.Sh DEPRECATION NOTICE
The
.Nm
driver is not present in
.Fx 13.0
and later.
See https://github.com/freebsd/fcp/blob/master/fcp-0101.md for more
information.
.Sh DESCRIPTION
The
.Nm
driver provides support for 8 and 16bit Ethernet cards that are based on
the National Semiconductor DS8390 and similar NICs manufactured by
other companies.
The
.Nm
driver also supports many PC Card chips which interface via MII to a PHY.
Axiom's AX88790, AX88190 and AX88190A;
DLink's DL10019 and DL10022; and
Tamarack's TC5299J chips all support internal or external MII/PHY combinations.
Realtek's PCI and ISA RTL80x9-based cards are also supported.
For these chipsets, autonegotiation and status reporting are supported.
.Pp
In addition to the standard port and IRQ specifications, the
.Nm
driver also supports a number of
.Cd flags
which can force 8/16bit mode, enable/disable multi-buffering, and select the default
interface type (AUI/BNC, and for cards with twisted pair, AUI/10BaseT).
.Pp
The
.Cd flags
are a bit field, and are summarized as follows:
.Bl -tag -width indent
.It Li 0x01
Disable transceiver.
On those cards which support it, this flag causes the transceiver to
be disabled and the AUI connection to be used by default.
.It Li 0x02
Force 8bit mode.
This flag forces the card to 8bit mode regardless of how the
card identifies itself.
This may be needed for some clones which incorrectly
identify themselves as 16bit, even though they only have an 8bit interface.
This flag takes precedence over force 16bit mode.
.It Li 0x04
Force 16bit mode.
This flag forces the card to 16bit mode regardless of how the
card identifies itself.
This may be needed for some clones which incorrectly
identify themselves as 8bit, even though they have a 16bit ISA interface.
.It Li 0x08
Disable transmitter multi-buffering.
This flag disables the use of multiple
transmit buffers and may be necessary in rare cases where packets are sent out
faster than a machine on the other end can handle (as evidenced by severe packet
lossage).
Some
.No ( non- Ns Fx
:-)) machines have terrible Ethernet performance
and simply cannot cope with 1100K+ data rates.
Use of this flag also provides
one more packet worth of receiver buffering, and on 8bit cards, this may help
reduce receiver lossage.
.El
.Pp
When using a 3c503 card, the AUI connection may be selected by specifying the
.Cm link2
option to
.Xr ifconfig 8
(BNC is the default).
.Sh HARDWARE
The
.Nm
driver supports the following Ethernet NICs:
.Pp
.Bl -bullet -compact
.It
3Com 3c503 Etherlink II
.Pq Cd "options ED_3C503"
.It
AR-P500 Ethernet
.It
Accton EN1644 (old model), EN1646 (old model), EN2203 (old model) (110pin)
(flags 0xd00000)
.It
Accton EN2212/EN2216/UE2216
.It
Allied Telesis CentreCOM LA100-PCM_V2
.It
AmbiCom 10BaseT card (8002, 8002T, 8010 and 8610)
.It
Bay Networks NETGEAR FA410TXC Fast Ethernet
.It
Belkin F5D5020 PC Card Fast Ethernet
.It
Billionton LM5LT-10B Ethernet/Modem PC Card
.It
Billionton LNT-10TB, LNT-10TN Ethernet PC Card
.It
Bromax iPort 10/100 Ethernet PC Card
.It
Bromax iPort 10 Ethernet PC Card
.It
Buffalo LPC2-CLT, LPC3-CLT, LPC3-CLX, LPC4-TX, LPC-CTX PC Card
.It
Buffalo LPC-CF-CLT CF Card
.It
CNet BC40 adapter
.It
Compex Net-A adapter
.It
Compex RL2000
.It
Corega Ether PCC-T/EtherII PCC-T/FEther PCC-TXF/PCC-TXD PCC-T/Fether II TXD
.It
Corega LAPCCTXD (TC5299J)
.It
CyQ've ELA-010
.It
DEC EtherWorks DE305
.It
Danpex EN-6200P2
.It
D-Link DE-660, DE-660+
.It
D-Link IC-CARD/IC-CARD+ Ethernet
.It
ELECOM Laneed LD-CDL/TX, LD-CDF, LD-CDS, LD-10/100CD, LD-CDWA (DP83902A)
.It
Hawking PN652TX PC Card (AX88790)
.It
HP PC Lan+ 27247B and 27252A
.Pq Cd "options ED_HPP"
.It
IBM Creditcard Ethernet I/II
.It
I-O DATA ET2/T-PCI
.It
I-O DATA PCLATE
.It
Kingston KNE-PC2, CIO10T, KNE-PCM/x Ethernet
.It
KTI ET32P2 PCI
.It
Linksys EC2T/PCMPC100/PCM100, PCMLM56
.It
Linksys EtherFast 10/100 PC Card, Combo PCMCIA Ethernet Card (PCMPC100 V2)
.It
MACNICA Ethernet ME1 for JEIDA
.It
MELCO LGY-PCI-TR
.It
MELCO LPC-T/LPC2-T/LPC2-CLT/LPC2-TX/LPC3-TX/LPC3-CLX
.It
NDC Ethernet Instant-Link
.It
National Semiconductor InfoMover NE4100
.It
NetGear FA-410TX
.It
NetVin NV5000SC
.It
Network Everywhere Ethernet 10BaseT PC Card
.It
New Media LANSurfer 10+56 Ethernet/Modem
.It
New Media LANSurfer
.It
Novell NE1000/NE2000/NE2100
.It
PLANEX ENW-8300-T
.It
PLANEX FNW-3600-T
.It
Psion 10/100 LANGLOBAL Combine iT
.It
RealTek 8019
.It
RealTek 8029
.It
Relia Combo-L/M-56k PC Card
.It
SMC Elite 16 WD8013
.It
SMC Elite Ultra
.It
SMC WD8003E/WD8003EBT/WD8003S/WD8003SBT/WD8003W/WD8013EBT/WD8013W and clones
.It
SMC EZCard PC Card, 8040-TX, 8041-TX (AX88x90), 8041-TX V.2 (TC5299J)
.It
Socket LP-E, ES-1000 Ethernet/Serial, LP-E CF, LP-FE CF
.It
Surecom EtherPerfect EP-427
.It
Surecom NE-34
.It
TDK 3000/3400/5670 Fast Ethernet/Modem
.It
TDK LAK-CD031, Grey Cell GCS2000 Ethernet Card
.It
TDK DFL5610WS Ethernet/Modem PC Card
.It
Telecom Device SuperSocket RE450T
.It
Toshiba LANCT00A PC Card
.It
VIA VT86C926
.It
Winbond W89C940
.It
Winbond W89C940F
.El
.Pp
ISA, PCI and PC Card devices are supported.
.Pp
The
.Nm
driver does not support the following Ethernet NICs:
.Pp
.Bl -bullet -compact
.It
Mitsubishi LAN Adapter B8895
.El
.Sh DIAGNOSTICS
.Bl -diag
.It "ed%d: failed to clear shared memory at %x - check configuration."
When the card was probed at system boot time, the
.Nm
driver found that it could not clear the card's shared memory.
This is most commonly
caused by a BIOS extension ROM being configured in the same address space as the
Ethernet card's shared memory.
Either find the offending card and change its BIOS
ROM to be at an address that does not conflict, or change the
settings in
.Xr device.hints 5
that the card's shared memory is mapped at a
non-conflicting address.
.It "ed%d: Invalid irq configuration (%d) must be 2-5 for 3c503."
The IRQ number that was specified in the
.Xr device.hints 5
file is not valid for the 3Com 3c503 card.
The 3c503 can only be assigned to IRQs 2 through 5.
.It "ed%d: Cannot find start of RAM."
.It "ed%d: Cannot find any RAM, start : %d, x = %d."
The probe of a Gateway card was unsuccessful in configuring the card's packet memory.
This likely indicates that the card was improperly recognized as a Gateway or that
the card is defective.
.It "ed: packets buffered, but transmitter idle."
Indicates a logic problem in the driver.
Should never happen.
.It "ed%d: device timeout"
Indicates that an expected transmitter interrupt did not occur.
Usually caused by an
interrupt conflict with another card on the ISA bus.
This condition could also be caused if the kernel is configured for a
different IRQ channel than the one the card is actually using.
If that is the case, you will have to either reconfigure the card
using a DOS utility or set the jumpers on the card appropriately.
.It "ed%d: NIC memory corrupt - invalid packet length %d."
Indicates that a packet was received with a packet length that was either larger than
the maximum size or smaller than the minimum size allowed by the IEEE 802.3 standard.
Usually
caused by a conflict with another card on the ISA bus, but in some cases may also
indicate faulty cabling.
.It "ed%d: remote transmit DMA failed to complete."
This indicates that a programmed I/O transfer to an NE1000 or NE2000 style card
has failed to properly complete.
Usually caused by the ISA bus speed being set
too fast.
.It "ed%d: Invalid irq configuration (%ld) must be %s for %s"
Indicates the device has a different IRQ than supported or expected.
.It "ed%d: Cannot locate my ports!"
The device is using a different I/O port than the driver knows about.
.It "ed%d: Cannot extract MAC address"
Attempts to get the MAC address failed.
.It "ed%d: Missing mii!"
Probing for an MII bus has failed.
This indicates a coding error in the PC Card attachment, because a PHY
is required for the chips that generate this error message.
.El
.Sh SEE ALSO
.Xr altq 4 ,
.Xr arp 4 ,
.Xr miibus 4 ,
.Xr netintro 4 ,
.Xr ng_ether 4 ,
.Xr device.hints 5 ,
.Xr ifconfig 8
.Sh HISTORY
The
.Nm
device driver first appeared in
.Fx 1.0 .
.Sh AUTHORS
The
.Nm
device driver and this manual page were written by
.An David Greenman .
.Sh CAVEATS
Early revision DS8390 chips have problems.
They lock up whenever the receive
ring-buffer overflows.
They occasionally switch the byte order
of the length field in the packet ring header (several different causes
of this related to an off-by-one byte alignment) - resulting in
.Qq Li "NIC memory corrupt - invalid packet length"
messages.
The card is reset
whenever these problems occur, but otherwise there is no problem with
recovering from these conditions.
.Pp
The NIC memory access to 3Com and Novell cards is much slower than it is on
WD/SMC cards; it is less than 1MB/second on 8bit boards and less than 2MB/second
on the 16bit cards.
This can lead to ring-buffer overruns resulting in
dropped packets during heavy network traffic.
.Pp
The Mitsubishi B8895 PC Card uses a DP83902, but its ASIC part is
undocumented.
Neither the NE2000 nor the WD83x0 drivers work with this card.
.Sh BUGS
The
.Nm
driver is a bit too aggressive about resetting the card whenever any bad
packets are received.
As a result, it may throw out some good packets which
have been received but not yet transferred from the card to main memory.
.Pp
The
.Nm
driver is slow by today's standards.
.Pp
PC Card attachment supports the D-Link DMF650TX LAN/Modem card's Ethernet
port only at this time.
.Pp
Some devices supported by
.Nm
do not generate the link state change events used by
.Xr devd 8
to start
.Xr dhclient 8 .
If you have problems with
.Xr dhclient 8
not starting and the device is always attached to the network it may
be possible to work around this by changing
.Dq Li DHCP
to
.Dq Li SYNCDHCP
in the
.Va ifconfig_ed0
entry in
.Pa /etc/rc.conf .

View file

@ -292,9 +292,6 @@ device cpufreq
# bxe: Broadcom NetXtreme II (BCM5771X/BCM578XX) PCIe 10Gb Ethernet
# adapters.
# ed: Western Digital and SMC 80xx; Novell NE1000 and NE2000; 3Com 3C503
# HP PC Lan+, various PC Card devices
# (requires miibus)
# ipw: Intel PRO/Wireless 2100 IEEE 802.11 adapter
# Requires the ipw firmware module
# iwi: Intel PRO/Wireless 2200BG/2225BG/2915ABG IEEE 802.11 adapters
@ -312,7 +309,6 @@ device cpufreq
# Requires the wpi firmware module
device bxe # Broadcom NetXtreme II BCM5771X/BCM578XX 10GbE
device ed # NE[12]000, SMC Ultra, 3c503, DS8390 cards
options ED_3C503
options ED_HPP
options ED_SIC

View file

@ -1583,11 +1583,6 @@ dev/drm2/ttm/ttm_execbuf_util.c optional drm2
dev/drm2/ttm/ttm_memory.c optional drm2
dev/drm2/ttm/ttm_page_alloc.c optional drm2
dev/drm2/ttm/ttm_bo_vm.c optional drm2
dev/ed/if_ed.c optional ed
dev/ed/if_ed_novell.c optional ed
dev/ed/if_ed_rtl80x9.c optional ed
dev/ed/if_ed_pccard.c optional ed pccard
dev/ed/if_ed_pci.c optional ed pci
dev/efidev/efidev.c optional efirt
dev/efidev/efirt.c optional efirt
dev/efidev/efirtc.c optional efirt

View file

@ -1,40 +0,0 @@
/*-
* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
*
* Copyright (c) 2005, M. Warner Losh.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice unmodified, this list of conditions, and the following
* disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
/* AX88x90 based miibus defines */
#define ED_AX88X90_MIIBUS 0x04 /* MII bus register on ASIC */
#define ED_AX88X90_MII_CLK 0x01
#define ED_AX88X90_MII_DIRIN 0x02
#define ED_AX88X90_MII_DATAIN 0x04
#define ED_AX88X90_MII_DATAOUT 0x08
#define ED_AX88X90_TEST 0x05 /* "test" register on asic */
#define ED_AX88X90_GPIO 0x07 /* GPIO pins */
#define ED_AX88X90_GPIO_INT_PHY 0x10

View file

@ -1,45 +0,0 @@
/*-
* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
*
* Copyright (c) 2005, M. Warner Losh.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice unmodified, this list of conditions, and the following
* disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
/* Dlink chipset used on some Netgear and Dlink PCMCIA cards */
#define ED_DL100XX_MIIBUS 0x0c /* MII bus register on ASIC */
#define ED_DL10022_DIAG 0x0d
#define ED_DL10022_COLLISON_DIS 4 /* Disable collision detection */
#define ED_DL10022_MII_RESET1 0x04
#define ED_DL10022_MII_RESET2 0x08
#define ED_DL100XX_MII_DATAIN 0x10
#define ED_DL10022_MII_DIROUT 0x20
#define ED_DL10019_MII_DIROUT 0x10
#define ED_DL100XX_MII_DIROUT (ED_DL10022_MII_DIROUT | ED_DL10019_MII_DIROUT)
#define ED_DL100XX_MII_DATAOUT 0x40
#define ED_DL100XX_MII_CLK 0x80

File diff suppressed because it is too large Load diff

View file

@ -1,374 +0,0 @@
/*-
* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
*
* Copyright (c) 2005, M. Warner Losh
* All rights reserved.
* Copyright (c) 1995, David Greenman
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice unmodified, this list of conditions, and the following
* disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include "opt_ed.h"
#ifdef ED_3C503
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/sockio.h>
#include <sys/mbuf.h>
#include <sys/kernel.h>
#include <sys/socket.h>
#include <sys/syslog.h>
#include <sys/bus.h>
#include <machine/bus.h>
#include <sys/rman.h>
#include <machine/resource.h>
#include <net/ethernet.h>
#include <net/if.h>
#include <net/if_var.h> /* XXX: ed_3c503_mediachg() */
#include <net/if_arp.h>
#include <net/if_dl.h>
#include <net/if_mib.h>
#include <net/if_media.h>
#include <net/bpf.h>
#include <dev/ed/if_edreg.h>
#include <dev/ed/if_edvar.h>
static void ed_3c503_mediachg(struct ed_softc *sc);
/*
* Probe and vendor-specific initialization routine for 3Com 3c503 boards
*/
int
ed_probe_3Com(device_t dev, int port_rid, int flags)
{
struct ed_softc *sc = device_get_softc(dev);
int error;
int i;
u_int memsize;
u_char isa16bit;
rman_res_t conf_maddr, conf_msize, irq, junk, pmem;
error = ed_alloc_port(dev, 0, ED_3COM_IO_PORTS);
if (error)
return (error);
sc->asic_offset = ED_3COM_ASIC_OFFSET;
sc->nic_offset = ED_3COM_NIC_OFFSET;
/*
* Verify that the kernel configured I/O address matches the board
* configured address
*/
switch (ed_asic_inb(sc, ED_3COM_BCFR)) {
case ED_3COM_BCFR_300:
if (rman_get_start(sc->port_res) != 0x300)
return (ENXIO);
break;
case ED_3COM_BCFR_310:
if (rman_get_start(sc->port_res) != 0x310)
return (ENXIO);
break;
case ED_3COM_BCFR_330:
if (rman_get_start(sc->port_res) != 0x330)
return (ENXIO);
break;
case ED_3COM_BCFR_350:
if (rman_get_start(sc->port_res) != 0x350)
return (ENXIO);
break;
case ED_3COM_BCFR_250:
if (rman_get_start(sc->port_res) != 0x250)
return (ENXIO);
break;
case ED_3COM_BCFR_280:
if (rman_get_start(sc->port_res) != 0x280)
return (ENXIO);
break;
case ED_3COM_BCFR_2A0:
if (rman_get_start(sc->port_res) != 0x2a0)
return (ENXIO);
break;
case ED_3COM_BCFR_2E0:
if (rman_get_start(sc->port_res) != 0x2e0)
return (ENXIO);
break;
default:
return (ENXIO);
}
error = bus_get_resource(dev, SYS_RES_MEMORY, 0,
&conf_maddr, &conf_msize);
if (error)
return (error);
/*
* Verify that the kernel shared memory address matches the board
* configured address.
*/
switch (ed_asic_inb(sc, ED_3COM_PCFR)) {
case ED_3COM_PCFR_DC000:
if (conf_maddr != 0xdc000)
return (ENXIO);
break;
case ED_3COM_PCFR_D8000:
if (conf_maddr != 0xd8000)
return (ENXIO);
break;
case ED_3COM_PCFR_CC000:
if (conf_maddr != 0xcc000)
return (ENXIO);
break;
case ED_3COM_PCFR_C8000:
if (conf_maddr != 0xc8000)
return (ENXIO);
break;
default:
return (ENXIO);
}
/*
* Reset NIC and ASIC. Enable on-board transceiver throughout reset
* sequence because it'll lock up if the cable isn't connected if we
* don't.
*/
ed_asic_outb(sc, ED_3COM_CR, ED_3COM_CR_RST | ED_3COM_CR_XSEL);
/*
* Wait for a while, then un-reset it
*/
DELAY(50);
/*
* The 3Com ASIC defaults to rather strange settings for the CR after
* a reset - it's important to set it again after the following outb
* (this is done when we map the PROM below).
*/
ed_asic_outb(sc, ED_3COM_CR, ED_3COM_CR_XSEL);
/*
* Wait a bit for the NIC to recover from the reset
*/
DELAY(5000);
sc->vendor = ED_VENDOR_3COM;
sc->type_str = "3c503";
sc->mem_shared = 1;
sc->cr_proto = ED_CR_RD2;
/*
* Hmmm...a 16bit 3Com board has 16k of memory, but only an 8k window
* to it.
*/
memsize = 8192;
/*
* Get station address from on-board ROM
*/
/*
* First, map ethernet address PROM over the top of where the NIC
* registers normally appear.
*/
ed_asic_outb(sc, ED_3COM_CR, ED_3COM_CR_EALO | ED_3COM_CR_XSEL);
for (i = 0; i < ETHER_ADDR_LEN; ++i)
sc->enaddr[i] = ed_nic_inb(sc, i);
/*
* Unmap PROM - select NIC registers. The proper setting of the
* tranceiver is set in ed_init so that the attach code is given a
* chance to set the default based on a compile-time config option
*/
ed_asic_outb(sc, ED_3COM_CR, ED_3COM_CR_XSEL);
/*
* Determine if this is an 8bit or 16bit board
*/
/*
* select page 0 registers
*/
ed_nic_barrier(sc, ED_P0_CR, 1,
BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
ed_nic_outb(sc, ED_P0_CR, ED_CR_PAGE_0 | ED_CR_RD2 | ED_CR_STP);
ed_nic_barrier(sc, ED_P0_CR, 1,
BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
/*
* Attempt to clear WTS bit. If it doesn't clear, then this is a 16bit
* board.
*/
ed_nic_outb(sc, ED_P0_DCR, 0);
/*
* select page 2 registers
*/
ed_nic_barrier(sc, ED_P0_CR, 1,
BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
ed_nic_outb(sc, ED_P0_CR, ED_CR_PAGE_2 | ED_CR_RD2 | ED_CR_STP);
ed_nic_barrier(sc, ED_P0_CR, 1,
BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
/*
* The 3c503 forces the WTS bit to a one if this is a 16bit board
*/
if (ed_nic_inb(sc, ED_P2_DCR) & ED_DCR_WTS)
isa16bit = 1;
else
isa16bit = 0;
/*
* select page 0 registers
*/
ed_nic_outb(sc, ED_P2_CR, ED_CR_RD2 | ED_CR_STP);
error = ed_alloc_memory(dev, 0, memsize);
if (error)
return (error);
pmem = rman_get_start(sc->mem_res);
error = ed_isa_mem_ok(dev, pmem, memsize);
if (error)
return (error);
sc->mem_start = 0;
sc->mem_size = memsize;
sc->mem_end = sc->mem_start + memsize;
/*
* We have an entire 8k window to put the transmit buffers on the
* 16bit boards. But since the 16bit 3c503's shared memory is only
* fast enough to overlap the loading of one full-size packet, trying
* to load more than 2 buffers can actually leave the transmitter idle
* during the load. So 2 seems the best value. (Although a mix of
* variable-sized packets might change this assumption. Nonetheless,
* we optimize for linear transfers of same-size packets.)
*/
if (isa16bit) {
if (flags & ED_FLAGS_NO_MULTI_BUFFERING)
sc->txb_cnt = 1;
else
sc->txb_cnt = 2;
sc->tx_page_start = ED_3COM_TX_PAGE_OFFSET_16BIT;
sc->rec_page_start = ED_3COM_RX_PAGE_OFFSET_16BIT;
sc->rec_page_stop = memsize / ED_PAGE_SIZE +
ED_3COM_RX_PAGE_OFFSET_16BIT;
sc->mem_ring = sc->mem_start;
} else {
sc->txb_cnt = 1;
sc->tx_page_start = ED_3COM_TX_PAGE_OFFSET_8BIT;
sc->rec_page_start = ED_TXBUF_SIZE + ED_3COM_TX_PAGE_OFFSET_8BIT;
sc->rec_page_stop = memsize / ED_PAGE_SIZE +
ED_3COM_TX_PAGE_OFFSET_8BIT;
sc->mem_ring = sc->mem_start + (ED_PAGE_SIZE * ED_TXBUF_SIZE);
}
sc->isa16bit = isa16bit;
/*
* Initialize GA page start/stop registers. Probably only needed if
* doing DMA, but what the hell.
*/
ed_asic_outb(sc, ED_3COM_PSTR, sc->rec_page_start);
ed_asic_outb(sc, ED_3COM_PSPR, sc->rec_page_stop);
/*
* Set IRQ. 3c503 only allows a choice of irq 2-5.
*/
error = bus_get_resource(dev, SYS_RES_IRQ, 0, &irq, &junk);
if (error)
return (error);
switch (irq) {
case 2:
case 9:
ed_asic_outb(sc, ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ2);
break;
case 3:
ed_asic_outb(sc, ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ3);
break;
case 4:
ed_asic_outb(sc, ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ4);
break;
case 5:
ed_asic_outb(sc, ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ5);
break;
default:
device_printf(dev, "Invalid irq configuration (%jd) must be 3-5,9 for 3c503\n",
irq);
return (ENXIO);
}
/*
* Initialize GA configuration register. Set bank and enable shared
* mem.
*/
ed_asic_outb(sc, ED_3COM_GACFR, ED_3COM_GACFR_RSEL |
ED_3COM_GACFR_MBS0);
/*
* Initialize "Vector Pointer" registers. These gawd-awful things are
* compared to 20 bits of the address on ISA, and if they match, the
* shared memory is disabled. We set them to 0xffff0...allegedly the
* reset vector.
*/
ed_asic_outb(sc, ED_3COM_VPTR2, 0xff);
ed_asic_outb(sc, ED_3COM_VPTR1, 0xff);
ed_asic_outb(sc, ED_3COM_VPTR0, 0x00);
error = ed_clear_memory(dev);
if (error == 0) {
sc->sc_mediachg = ed_3c503_mediachg;
sc->sc_write_mbufs = ed_shmem_write_mbufs;
}
return (error);
}
static void
ed_3c503_mediachg(struct ed_softc *sc)
{
struct ifnet *ifp = sc->ifp;
/*
* If this is a 3Com board, the tranceiver must be software enabled
* (there is no settable hardware default).
*/
if (ifp->if_flags & IFF_LINK2)
ed_asic_outb(sc, ED_3COM_CR, 0);
else
ed_asic_outb(sc, ED_3COM_CR, ED_3COM_CR_XSEL);
}
#endif /* ED_3C503 */

View file

@ -1,679 +0,0 @@
/*-
* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
*
* Copyright (c) 2005, M. Warner Losh
* All rights reserved.
* Copyright (c) 1995, David Greenman
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice unmodified, this list of conditions, and the following
* disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include "opt_ed.h"
#ifdef ED_HPP
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/sockio.h>
#include <sys/mbuf.h>
#include <sys/kernel.h>
#include <sys/socket.h>
#include <sys/syslog.h>
#include <sys/bus.h>
#include <machine/bus.h>
#include <sys/rman.h>
#include <machine/resource.h>
#include <net/ethernet.h>
#include <net/if.h>
#include <net/if_var.h> /* XXX: ed_hpp_set_physical_link() */
#include <net/if_arp.h>
#include <net/if_dl.h>
#include <net/if_mib.h>
#include <net/if_media.h>
#include <net/bpf.h>
#include <dev/ed/if_edreg.h>
#include <dev/ed/if_edvar.h>
static void ed_hpp_readmem(struct ed_softc *, bus_size_t, uint8_t *,
uint16_t);
static void ed_hpp_writemem(struct ed_softc *, uint8_t *, uint16_t,
uint16_t);
static void ed_hpp_set_physical_link(struct ed_softc *sc);
static u_short ed_hpp_write_mbufs(struct ed_softc *, struct mbuf *,
bus_size_t);
/*
* Interrupt conversion table for the HP PC LAN+
*/
static uint16_t ed_hpp_intr_val[] = {
0, /* 0 */
0, /* 1 */
0, /* 2 */
3, /* 3 */
4, /* 4 */
5, /* 5 */
6, /* 6 */
7, /* 7 */
0, /* 8 */
9, /* 9 */
10, /* 10 */
11, /* 11 */
12, /* 12 */
0, /* 13 */
0, /* 14 */
15 /* 15 */
};
#define ED_HPP_TEST_SIZE 16
/*
* Probe and vendor specific initialization for the HP PC Lan+ Cards.
* (HP Part nos: 27247B and 27252A).
*
* The card has an asic wrapper around a DS8390 core. The asic handles
* host accesses and offers both standard register IO and memory mapped
* IO. Memory mapped I/O allows better performance at the expense of greater
* chance of an incompatibility with existing ISA cards.
*
* The card has a few caveats: it isn't tolerant of byte wide accesses, only
* short (16 bit) or word (32 bit) accesses are allowed. Some card revisions
* don't allow 32 bit accesses; these are indicated by a bit in the software
* ID register (see if_edreg.h).
*
* Other caveats are: we should read the MAC address only when the card
* is inactive.
*
* For more information; please consult the CRYNWR packet driver.
*
* The AUI port is turned on using the "link2" option on the ifconfig
* command line.
*/
int
ed_probe_HP_pclanp(device_t dev, int port_rid, int flags)
{
struct ed_softc *sc = device_get_softc(dev);
int error;
int n; /* temp var */
int memsize; /* mem on board */
u_char checksum; /* checksum of board address */
u_char irq; /* board configured IRQ */
uint8_t test_pattern[ED_HPP_TEST_SIZE]; /* read/write areas for */
uint8_t test_buffer[ED_HPP_TEST_SIZE]; /* probing card */
rman_res_t conf_maddr, conf_msize, conf_irq, junk;
error = ed_alloc_port(dev, 0, ED_HPP_IO_PORTS);
if (error)
return (error);
/* Fill in basic information */
sc->asic_offset = ED_HPP_ASIC_OFFSET;
sc->nic_offset = ED_HPP_NIC_OFFSET;
sc->chip_type = ED_CHIP_TYPE_DP8390;
sc->isa16bit = 0; /* the 8390 core needs to be in byte mode */
/*
* Look for the HP PCLAN+ signature: "0x50,0x48,0x00,0x53"
*/
if ((ed_asic_inb(sc, ED_HPP_ID) != 0x50) ||
(ed_asic_inb(sc, ED_HPP_ID + 1) != 0x48) ||
((ed_asic_inb(sc, ED_HPP_ID + 2) & 0xF0) != 0) ||
(ed_asic_inb(sc, ED_HPP_ID + 3) != 0x53))
return (ENXIO);
/*
* Read the MAC address and verify checksum on the address.
*/
ed_asic_outw(sc, ED_HPP_PAGING, ED_HPP_PAGE_MAC);
for (n = 0, checksum = 0; n < ETHER_ADDR_LEN; n++)
checksum += (sc->enaddr[n] =
ed_asic_inb(sc, ED_HPP_MAC_ADDR + n));
checksum += ed_asic_inb(sc, ED_HPP_MAC_ADDR + ETHER_ADDR_LEN);
if (checksum != 0xFF)
return (ENXIO);
/*
* Verify that the software model number is 0.
*/
ed_asic_outw(sc, ED_HPP_PAGING, ED_HPP_PAGE_ID);
if (((sc->hpp_id = ed_asic_inw(sc, ED_HPP_PAGE_4)) &
ED_HPP_ID_SOFT_MODEL_MASK) != 0x0000)
return (ENXIO);
/*
* Read in and save the current options configured on card.
*/
sc->hpp_options = ed_asic_inw(sc, ED_HPP_OPTION);
sc->hpp_options |= (ED_HPP_OPTION_NIC_RESET |
ED_HPP_OPTION_CHIP_RESET | ED_HPP_OPTION_ENABLE_IRQ);
/*
* Reset the chip. This requires writing to the option register
* so take care to preserve the other bits.
*/
ed_asic_outw(sc, ED_HPP_OPTION,
(sc->hpp_options & ~(ED_HPP_OPTION_NIC_RESET |
ED_HPP_OPTION_CHIP_RESET)));
DELAY(5000); /* wait for chip reset to complete */
ed_asic_outw(sc, ED_HPP_OPTION,
(sc->hpp_options | (ED_HPP_OPTION_NIC_RESET |
ED_HPP_OPTION_CHIP_RESET |
ED_HPP_OPTION_ENABLE_IRQ)));
DELAY(5000);
if (!(ed_nic_inb(sc, ED_P0_ISR) & ED_ISR_RST))
return (ENXIO); /* reset did not complete */
/*
* Read out configuration information.
*/
ed_asic_outw(sc, ED_HPP_PAGING, ED_HPP_PAGE_HW);
irq = ed_asic_inb(sc, ED_HPP_HW_IRQ);
/*
* Check for impossible IRQ.
*/
if (irq >= nitems(ed_hpp_intr_val))
return (ENXIO);
/*
* If the kernel IRQ was specified with a '?' use the cards idea
* of the IRQ. If the kernel IRQ was explicitly specified, it
* should match that of the hardware.
*/
error = bus_get_resource(dev, SYS_RES_IRQ, 0, &conf_irq, &junk);
if (error)
bus_set_resource(dev, SYS_RES_IRQ, 0, ed_hpp_intr_val[irq], 1);
else {
if (conf_irq != ed_hpp_intr_val[irq])
return (ENXIO);
}
/*
* Fill in softconfig info.
*/
sc->vendor = ED_VENDOR_HP;
sc->type = ED_TYPE_HP_PCLANPLUS;
sc->type_str = "HP-PCLAN+";
sc->mem_shared = 0; /* we DON'T have dual ported RAM */
sc->mem_start = 0; /* we use offsets inside the card RAM */
sc->hpp_mem_start = NULL;/* no memory mapped I/O by default */
/*
* The board has 32KB of memory. Is there a way to determine
* this programmatically?
*/
memsize = 32768;
/*
* Check if memory mapping of the I/O registers possible.
*/
if (sc->hpp_options & ED_HPP_OPTION_MEM_ENABLE) {
u_long mem_addr;
/*
* determine the memory address from the board.
*/
ed_asic_outw(sc, ED_HPP_PAGING, ED_HPP_PAGE_HW);
mem_addr = (ed_asic_inw(sc, ED_HPP_HW_MEM_MAP) << 8);
/*
* Check that the kernel specified start of memory and
* hardware's idea of it match.
*/
error = bus_get_resource(dev, SYS_RES_MEMORY, 0,
&conf_maddr, &conf_msize);
if (error)
return (error);
if (mem_addr != conf_maddr)
return (ENXIO);
error = ed_alloc_memory(dev, 0, memsize);
if (error)
return (error);
sc->hpp_mem_start = rman_get_virtual(sc->mem_res);
}
/*
* Fill in the rest of the soft config structure.
*/
/*
* The transmit page index.
*/
sc->tx_page_start = ED_HPP_TX_PAGE_OFFSET;
if (device_get_flags(dev) & ED_FLAGS_NO_MULTI_BUFFERING)
sc->txb_cnt = 1;
else
sc->txb_cnt = 2;
/*
* Memory description
*/
sc->mem_size = memsize;
sc->mem_ring = sc->mem_start +
(sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE);
sc->mem_end = sc->mem_start + sc->mem_size;
/*
* Receive area starts after the transmit area and
* continues till the end of memory.
*/
sc->rec_page_start = sc->tx_page_start +
(sc->txb_cnt * ED_TXBUF_SIZE);
sc->rec_page_stop = (sc->mem_size / ED_PAGE_SIZE);
sc->cr_proto = 0; /* value works */
/*
* Set the wrap registers for string I/O reads.
*/
ed_asic_outw(sc, ED_HPP_PAGING, ED_HPP_PAGE_HW);
ed_asic_outw(sc, ED_HPP_HW_WRAP,
((sc->rec_page_start / ED_PAGE_SIZE) |
(((sc->rec_page_stop / ED_PAGE_SIZE) - 1) << 8)));
/*
* Reset the register page to normal operation.
*/
ed_asic_outw(sc, ED_HPP_PAGING, ED_HPP_PAGE_PERF);
/*
* Verify that we can read/write from adapter memory.
* Create test pattern.
*/
for (n = 0; n < ED_HPP_TEST_SIZE; n++)
test_pattern[n] = (n*n) ^ ~n;
#undef ED_HPP_TEST_SIZE
/*
* Check that the memory is accessible thru the I/O ports.
* Write out the contents of "test_pattern", read back
* into "test_buffer" and compare the two for any
* mismatch.
*/
for (n = 0; n < (32768 / ED_PAGE_SIZE); n ++) {
ed_hpp_writemem(sc, test_pattern, (n * ED_PAGE_SIZE),
sizeof(test_pattern));
ed_hpp_readmem(sc, (n * ED_PAGE_SIZE),
test_buffer, sizeof(test_pattern));
if (bcmp(test_pattern, test_buffer,
sizeof(test_pattern)))
return (ENXIO);
}
sc->sc_mediachg = ed_hpp_set_physical_link;
sc->sc_write_mbufs = ed_hpp_write_mbufs;
sc->readmem = ed_hpp_readmem;
return (0);
}
/*
* HP PC Lan+ : Set the physical link to use AUI or TP/TL.
*/
static void
ed_hpp_set_physical_link(struct ed_softc *sc)
{
struct ifnet *ifp = sc->ifp;
int lan_page;
ed_asic_outw(sc, ED_HPP_PAGING, ED_HPP_PAGE_LAN);
lan_page = ed_asic_inw(sc, ED_HPP_PAGE_0);
if (ifp->if_flags & IFF_LINK2) {
/*
* Use the AUI port.
*/
lan_page |= ED_HPP_LAN_AUI;
ed_asic_outw(sc, ED_HPP_PAGING, ED_HPP_PAGE_LAN);
ed_asic_outw(sc, ED_HPP_PAGE_0, lan_page);
} else {
/*
* Use the ThinLan interface
*/
lan_page &= ~ED_HPP_LAN_AUI;
ed_asic_outw(sc, ED_HPP_PAGING, ED_HPP_PAGE_LAN);
ed_asic_outw(sc, ED_HPP_PAGE_0, lan_page);
}
/*
* Wait for the lan card to re-initialize itself
*/
DELAY(150000); /* wait 150 ms */
/*
* Restore normal pages.
*/
ed_asic_outw(sc, ED_HPP_PAGING, ED_HPP_PAGE_PERF);
}
/*
* Support routines to handle the HP PC Lan+ card.
*/
/*
* HP PC Lan+: Read from NIC memory, using either PIO or memory mapped
* IO.
*/
static void
ed_hpp_readmem(struct ed_softc *sc, bus_size_t src, uint8_t *dst,
uint16_t amount)
{
int use_32bit_access = !(sc->hpp_id & ED_HPP_ID_16_BIT_ACCESS);
/* Program the source address in RAM */
ed_asic_outw(sc, ED_HPP_PAGE_2, src);
/*
* The HP PC Lan+ card supports word reads as well as
* a memory mapped i/o port that is aliased to every
* even address on the board.
*/
if (sc->hpp_mem_start) {
/* Enable memory mapped access. */
ed_asic_outw(sc, ED_HPP_OPTION, sc->hpp_options &
~(ED_HPP_OPTION_MEM_DISABLE |
ED_HPP_OPTION_BOOT_ROM_ENB));
if (use_32bit_access && (amount > 3)) {
uint32_t *dl = (uint32_t *) dst;
volatile uint32_t *const sl =
(uint32_t *) sc->hpp_mem_start;
uint32_t *const fence = dl + (amount >> 2);
/*
* Copy out NIC data. We could probably write this
* as a `movsl'. The currently generated code is lousy.
*/
while (dl < fence)
*dl++ = *sl;
dst += (amount & ~3);
amount &= 3;
}
/* Finish off any words left, as a series of short reads */
if (amount > 1) {
u_short *d = (u_short *) dst;
volatile u_short *const s =
(u_short *) sc->hpp_mem_start;
u_short *const fence = d + (amount >> 1);
/* Copy out NIC data. */
while (d < fence)
*d++ = *s;
dst += (amount & ~1);
amount &= 1;
}
/*
* read in a byte; however we need to always read 16 bits
* at a time or the hardware gets into a funny state
*/
if (amount == 1) {
/* need to read in a short and copy LSB */
volatile u_short *const s =
(volatile u_short *) sc->hpp_mem_start;
*dst = (*s) & 0xFF;
}
/* Restore Boot ROM access. */
ed_asic_outw(sc, ED_HPP_OPTION, sc->hpp_options);
} else {
/* Read in data using the I/O port */
if (use_32bit_access && (amount > 3)) {
ed_asic_insl(sc, ED_HPP_PAGE_4, dst, amount >> 2);
dst += (amount & ~3);
amount &= 3;
}
if (amount > 1) {
ed_asic_insw(sc, ED_HPP_PAGE_4, dst, amount >> 1);
dst += (amount & ~1);
amount &= 1;
}
if (amount == 1) { /* read in a short and keep the LSB */
*dst = ed_asic_inw(sc, ED_HPP_PAGE_4) & 0xFF;
}
}
}
/*
* HP PC Lan+: Write to NIC memory, using either PIO or memory mapped
* IO.
* Only used in the probe routine to test the memory. 'len' must
* be even.
*/
static void
ed_hpp_writemem(struct ed_softc *sc, uint8_t *src, uint16_t dst, uint16_t len)
{
/* reset remote DMA complete flag */
ed_nic_outb(sc, ED_P0_ISR, ED_ISR_RDC);
/* program the write address in RAM */
ed_asic_outw(sc, ED_HPP_PAGE_0, dst);
if (sc->hpp_mem_start) {
u_short *s = (u_short *) src;
volatile u_short *d = (u_short *) sc->hpp_mem_start;
u_short *const fence = s + (len >> 1);
/*
* Enable memory mapped access.
*/
ed_asic_outw(sc, ED_HPP_OPTION, sc->hpp_options &
~(ED_HPP_OPTION_MEM_DISABLE |
ED_HPP_OPTION_BOOT_ROM_ENB));
/*
* Copy to NIC memory.
*/
while (s < fence)
*d = *s++;
/*
* Restore Boot ROM access.
*/
ed_asic_outw(sc, ED_HPP_OPTION, sc->hpp_options);
} else {
/* write data using I/O writes */
ed_asic_outsw(sc, ED_HPP_PAGE_4, src, len / 2);
}
}
/*
* Write to HP PC Lan+ NIC memory. Access to the NIC can be by using
* outsw() or via the memory mapped interface to the same register.
* Writes have to be in word units; byte accesses won't work and may cause
* the NIC to behave weirdly. Long word accesses are permitted if the ASIC
* allows it.
*/
static u_short
ed_hpp_write_mbufs(struct ed_softc *sc, struct mbuf *m, bus_size_t dst)
{
int len, wantbyte;
unsigned short total_len;
unsigned char savebyte[2];
volatile u_short * const d =
(volatile u_short *) sc->hpp_mem_start;
int use_32bit_accesses = !(sc->hpp_id & ED_HPP_ID_16_BIT_ACCESS);
/* select page 0 registers */
ed_nic_barrier(sc, ED_P0_CR, 1,
BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
ed_nic_barrier(sc, ED_P0_CR, 1,
BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
/* reset remote DMA complete flag */
ed_nic_outb(sc, ED_P0_ISR, ED_ISR_RDC);
/* program the write address in RAM */
ed_asic_outw(sc, ED_HPP_PAGE_0, dst);
if (sc->hpp_mem_start) /* enable memory mapped I/O */
ed_asic_outw(sc, ED_HPP_OPTION, sc->hpp_options &
~(ED_HPP_OPTION_MEM_DISABLE |
ED_HPP_OPTION_BOOT_ROM_ENB));
wantbyte = 0;
total_len = 0;
if (sc->hpp_mem_start) { /* Memory mapped I/O port */
while (m) {
total_len += (len = m->m_len);
if (len) {
caddr_t data = mtod(m, caddr_t);
/* finish the last word of the previous mbuf */
if (wantbyte) {
savebyte[1] = *data;
*d = *((u_short *) savebyte);
data++; len--; wantbyte = 0;
}
/* output contiguous words */
if ((len > 3) && (use_32bit_accesses)) {
volatile uint32_t *const dl =
(volatile uint32_t *) d;
uint32_t *sl = (uint32_t *) data;
uint32_t *fence = sl + (len >> 2);
while (sl < fence)
*dl = *sl++;
data += (len & ~3);
len &= 3;
}
/* finish off remain 16 bit writes */
if (len > 1) {
u_short *s = (u_short *) data;
u_short *fence = s + (len >> 1);
while (s < fence)
*d = *s++;
data += (len & ~1);
len &= 1;
}
/* save last byte if needed */
if ((wantbyte = (len == 1)) != 0)
savebyte[0] = *data;
}
m = m->m_next; /* to next mbuf */
}
if (wantbyte) /* write last byte */
*d = *((u_short *) savebyte);
} else {
/* use programmed I/O */
while (m) {
total_len += (len = m->m_len);
if (len) {
caddr_t data = mtod(m, caddr_t);
/* finish the last word of the previous mbuf */
if (wantbyte) {
savebyte[1] = *data;
ed_asic_outw(sc, ED_HPP_PAGE_4,
*((u_short *)savebyte));
data++;
len--;
wantbyte = 0;
}
/* output contiguous words */
if ((len > 3) && use_32bit_accesses) {
ed_asic_outsl(sc, ED_HPP_PAGE_4,
data, len >> 2);
data += (len & ~3);
len &= 3;
}
/* finish off remaining 16 bit accesses */
if (len > 1) {
ed_asic_outsw(sc, ED_HPP_PAGE_4,
data, len >> 1);
data += (len & ~1);
len &= 1;
}
if ((wantbyte = (len == 1)) != 0)
savebyte[0] = *data;
} /* if len != 0 */
m = m->m_next;
}
if (wantbyte) /* spit last byte */
ed_asic_outw(sc, ED_HPP_PAGE_4, *(u_short *)savebyte);
}
if (sc->hpp_mem_start) /* turn off memory mapped i/o */
ed_asic_outw(sc, ED_HPP_OPTION, sc->hpp_options);
return (total_len);
}
#endif /* ED_HPP */

View file

@ -1,206 +0,0 @@
/*-
* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
*
* Copyright (c) 1995, David Greenman
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice unmodified, this list of conditions, and the following
* disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include "opt_ed.h"
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/socket.h>
#include <sys/kernel.h>
#include <sys/module.h>
#include <sys/bus.h>
#include <machine/bus.h>
#include <net/ethernet.h>
#include <net/if.h>
#include <net/if_arp.h>
#include <net/if_media.h>
#include <net/if_mib.h>
#include <isa/isavar.h>
#include <dev/ed/if_edvar.h>
#include <dev/ed/if_edreg.h>
static int ed_isa_probe(device_t);
static int ed_isa_attach(device_t);
static struct isa_pnp_id ed_ids[] = {
{ 0x0131d805, NULL }, /* ANX3101 */
{ 0x4cf48906, NULL }, /* ATIf44c */
{ 0x01200507, NULL }, /* AXE2001 */
{ 0x0115180e, NULL }, /* CPX1501 */
{ 0x0090252a, NULL }, /* JQE9000 */
{ 0x0020832e, NULL }, /* KTC2000 */
{ 0xd680d041, NULL }, /* PNP80d6 */
{ 0x6081d041, NULL }, /* PNP8160 */
{ 0x19808c4a, NULL }, /* RTL8019 */
{ 0x1684a34d, NULL }, /* SMC8416 */
{ 0x1980635e, NULL }, /* WSC8019 */
{ 0, NULL }
};
static int
ed_isa_probe_Novell(device_t dev)
{
struct ed_softc *sc = device_get_softc(dev);
int flags = device_get_flags(dev);
int err;
err = ed_probe_Novell(dev, 0, flags);
if (err)
return err;
ed_Novell_read_mac(sc);
/*
* Final sanity check for Gateway Ethernet cards before
* believing that they really are Gateway AT.
* XXX I think this is stale.
*/
if ((ED_FLAGS_GETTYPE(flags) == ED_FLAGS_GWETHER) &&
(sc->enaddr[2] == 0x86)) {
sc->type_str = "Gateway AT";
}
return (0);
}
static int
ed_isa_probe(device_t dev)
{
struct ed_softc *sc = device_get_softc(dev);
int flags = device_get_flags(dev);
int error = 0;
/* Check isapnp ids */
error = ISA_PNP_PROBE(device_get_parent(dev), dev, ed_ids);
/* If the card had a PnP ID that didn't match any we know about */
if (error == ENXIO)
goto end;
/* If we had some other problem. */
if (!(error == 0 || error == ENOENT))
goto end;
/* Heuristic probes */
error = ed_probe_WD80x3(dev, 0, flags);
if (error == 0)
goto end;
ed_release_resources(dev);
error = ed_probe_RTL80x9(dev, 0, flags);
if (error == 0) {
ed_Novell_read_mac(sc);
goto end;
}
ed_release_resources(dev);
#ifdef ED_3C503
error = ed_probe_3Com(dev, 0, flags);
if (error == 0)
goto end;
ed_release_resources(dev);
#endif
#ifdef ED_SIC
error = ed_probe_SIC(dev, 0, flags);
if (error == 0)
goto end;
ed_release_resources(dev);
#endif
error = ed_isa_probe_Novell(dev);
if (error == 0)
goto end;
ed_release_resources(dev);
#ifdef ED_HPP
error = ed_probe_HP_pclanp(dev, 0, flags);
if (error == 0)
goto end;
ed_release_resources(dev);
#endif
end:
if (error == 0)
error = ed_alloc_irq(dev, 0, 0);
ed_release_resources(dev);
return (error);
}
static int
ed_isa_attach(device_t dev)
{
struct ed_softc *sc = device_get_softc(dev);
int error;
if (sc->port_used > 0)
ed_alloc_port(dev, 0, sc->port_used);
if (sc->mem_used)
ed_alloc_memory(dev, 0, sc->mem_used);
ed_alloc_irq(dev, 0, 0);
if (sc->sc_media_ioctl == NULL)
ed_gen_ifmedia_init(sc);
error = ed_attach(dev);
if (error) {
ed_release_resources(dev);
return (error);
}
error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET | INTR_MPSAFE,
NULL, edintr, sc, &sc->irq_handle);
if (error)
ed_release_resources(dev);
return (error);
}
static device_method_t ed_isa_methods[] = {
/* Device interface */
DEVMETHOD(device_probe, ed_isa_probe),
DEVMETHOD(device_attach, ed_isa_attach),
DEVMETHOD(device_detach, ed_detach),
{ 0, 0 }
};
static driver_t ed_isa_driver = {
"ed",
ed_isa_methods,
sizeof(struct ed_softc)
};
DRIVER_MODULE(ed, isa, ed_isa_driver, ed_devclass, 0, 0);
MODULE_DEPEND(ed, isa, 1, 1, 1);
MODULE_DEPEND(ed, ether, 1, 1, 1);
ISA_PNP_INFO(ed_ids);

View file

@ -1,316 +0,0 @@
/*-
* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
*
* Copyright (c) 2005, M. Warner Losh
* All rights reserved.
* Copyright (c) 1995, David Greenman
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice unmodified, this list of conditions, and the following
* disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include "opt_ed.h"
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/sockio.h>
#include <sys/mbuf.h>
#include <sys/kernel.h>
#include <sys/socket.h>
#include <sys/syslog.h>
#include <sys/bus.h>
#include <machine/bus.h>
#include <sys/rman.h>
#include <machine/resource.h>
#include <net/ethernet.h>
#include <net/if.h>
#include <net/if_arp.h>
#include <net/if_dl.h>
#include <net/if_mib.h>
#include <net/if_media.h>
#include <net/bpf.h>
#include <dev/ed/if_edreg.h>
#include <dev/ed/if_edvar.h>
static int ed_probe_gwether(device_t);
/*
* Probe and vendor-specific initialization routine for NE1000/2000 boards
*/
int
ed_probe_Novell_generic(device_t dev, int flags)
{
struct ed_softc *sc = device_get_softc(dev);
u_int memsize;
int error;
u_char tmp;
static char test_pattern[32] = "THIS is A memory TEST pattern";
char test_buffer[32];
/* Reset the board */
if (ED_FLAGS_GETTYPE(flags) == ED_FLAGS_GWETHER) {
ed_asic_outb(sc, ED_NOVELL_RESET, 0);
DELAY(200);
}
tmp = ed_asic_inb(sc, ED_NOVELL_RESET);
/*
* I don't know if this is necessary; probably cruft leftover from
* Clarkson packet driver code. Doesn't do a thing on the boards I've
* tested. -DG
*/
ed_asic_outb(sc, ED_NOVELL_RESET, tmp);
DELAY(5000);
/*
* This is needed because some NE clones apparently don't reset the
* NIC properly (or the NIC chip doesn't reset fully on power-up) XXX
* - this makes the probe invasive! ...Done against my better
* judgement. -DLG
*/
ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STP);
DELAY(5000);
/* Make sure that we really have an 8390 based board */
if (!ed_probe_generic8390(sc))
return (ENXIO);
sc->vendor = ED_VENDOR_NOVELL;
sc->mem_shared = 0;
sc->cr_proto = ED_CR_RD2;
/*
* Test the ability to read and write to the NIC memory. This has the
* side affect of determining if this is an NE1000 or an NE2000.
*/
/*
* This prevents packets from being stored in the NIC memory when the
* readmem routine turns on the start bit in the CR.
*/
ed_nic_outb(sc, ED_P0_RCR, ED_RCR_MON);
/* Temporarily initialize DCR for byte operations */
ed_nic_outb(sc, ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS);
ed_nic_outb(sc, ED_P0_PSTART, 8192 / ED_PAGE_SIZE);
ed_nic_outb(sc, ED_P0_PSTOP, 16384 / ED_PAGE_SIZE);
/*
* Some devices identify themselves. Some of those devices
* can't handle being probed, so we allow forcing a mode. If
* these flags are set, force it, otherwise probe.
*/
if (flags & ED_FLAGS_FORCE_8BIT_MODE) {
sc->isa16bit = 0;
sc->type = ED_TYPE_NE1000;
sc->type_str = "NE1000";
} else if (flags & ED_FLAGS_FORCE_16BIT_MODE) {
sc->isa16bit = 1;
sc->type = ED_TYPE_NE2000;
sc->type_str = "NE2000";
ed_nic_outb(sc, ED_P0_DCR, ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS);
ed_nic_outb(sc, ED_P0_PSTART, 16384 / ED_PAGE_SIZE);
ed_nic_outb(sc, ED_P0_PSTOP, 32768 / ED_PAGE_SIZE);
} else {
/*
* Write a test pattern in byte mode. If this fails, then there
* probably isn't any memory at 8k - which likely means that the board
* is an NE2000.
*/
ed_pio_writemem(sc, test_pattern, 8192, sizeof(test_pattern));
ed_pio_readmem(sc, 8192, test_buffer, sizeof(test_pattern));
if (bcmp(test_pattern, test_buffer, sizeof(test_pattern)) == 0) {
sc->type = ED_TYPE_NE1000;
sc->type_str = "NE1000";
sc->isa16bit = 0;
} else {
/* Not an NE1000 - try NE2000 */
sc->isa16bit = 1;
ed_nic_outb(sc, ED_P0_DCR, ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS);
ed_nic_outb(sc, ED_P0_PSTART, 16384 / ED_PAGE_SIZE);
ed_nic_outb(sc, ED_P0_PSTOP, 32768 / ED_PAGE_SIZE);
/*
* Write a test pattern in word mode. If this also fails, then
* we don't know what this board is.
*/
ed_pio_writemem(sc, test_pattern, 16384, sizeof(test_pattern));
ed_pio_readmem(sc, 16384, test_buffer, sizeof(test_pattern));
if (bcmp(test_pattern, test_buffer, sizeof(test_pattern)) == 0) {
sc->type = ED_TYPE_NE2000;
sc->type_str = "NE2000";
} else {
return (ENXIO);
}
}
}
sc->chip_type = ED_CHIP_TYPE_DP8390;
/* 8k of memory plus an additional 8k if 16bit */
memsize = 8192 + sc->isa16bit * 8192;
sc->mem_size = memsize;
/* NIC memory doesn't start at zero on an NE board */
/* The start address is tied to the bus width */
sc->mem_start = 8192 + sc->isa16bit * 8192;
sc->mem_end = sc->mem_start + memsize;
sc->tx_page_start = memsize / ED_PAGE_SIZE;
if (ED_FLAGS_GETTYPE(flags) == ED_FLAGS_GWETHER) {
error = ed_probe_gwether(dev);
if (error)
return (error);
}
/*
* Use one xmit buffer if < 16k, two buffers otherwise (if not told
* otherwise).
*/
if ((memsize < 16384) || (flags & ED_FLAGS_NO_MULTI_BUFFERING))
sc->txb_cnt = 1;
else
sc->txb_cnt = 2;
sc->rec_page_start = sc->tx_page_start + sc->txb_cnt * ED_TXBUF_SIZE;
sc->rec_page_stop = sc->tx_page_start + memsize / ED_PAGE_SIZE;
sc->mem_ring = sc->mem_start + sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE;
/* clear any pending interrupts that might have occurred above */
ed_nic_outb(sc, ED_P0_ISR, 0xff);
sc->sc_write_mbufs = ed_pio_write_mbufs;
return (0);
}
int
ed_probe_Novell(device_t dev, int port_rid, int flags)
{
struct ed_softc *sc = device_get_softc(dev);
int error;
error = ed_alloc_port(dev, port_rid, ED_NOVELL_IO_PORTS);
if (error)
return (error);
sc->asic_offset = ED_NOVELL_ASIC_OFFSET;
sc->nic_offset = ED_NOVELL_NIC_OFFSET;
return ed_probe_Novell_generic(dev, flags);
}
static int
ed_probe_gwether(device_t dev)
{
int x, i, msize = 0;
bus_size_t mstart = 0;
char pbuf0[ED_PAGE_SIZE], pbuf[ED_PAGE_SIZE], tbuf[ED_PAGE_SIZE];
struct ed_softc *sc = device_get_softc(dev);
for (i = 0; i < ED_PAGE_SIZE; i++)
pbuf0[i] = 0;
/* Clear all the memory. */
for (x = 1; x < 256; x++)
ed_pio_writemem(sc, pbuf0, x * 256, ED_PAGE_SIZE);
/* Search for the start of RAM. */
for (x = 1; x < 256; x++) {
ed_pio_readmem(sc, x * 256, tbuf, ED_PAGE_SIZE);
if (bcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) {
for (i = 0; i < ED_PAGE_SIZE; i++)
pbuf[i] = 255 - x;
ed_pio_writemem(sc, pbuf, x * 256, ED_PAGE_SIZE);
ed_pio_readmem(sc, x * 256, tbuf, ED_PAGE_SIZE);
if (bcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0) {
mstart = x * ED_PAGE_SIZE;
msize = ED_PAGE_SIZE;
break;
}
}
}
if (mstart == 0) {
device_printf(dev, "Cannot find start of RAM.\n");
return (ENXIO);
}
/* Probe the size of RAM. */
for (x = (mstart / ED_PAGE_SIZE) + 1; x < 256; x++) {
ed_pio_readmem(sc, x * 256, tbuf, ED_PAGE_SIZE);
if (bcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) {
for (i = 0; i < ED_PAGE_SIZE; i++)
pbuf[i] = 255 - x;
ed_pio_writemem(sc, pbuf, x * 256, ED_PAGE_SIZE);
ed_pio_readmem(sc, x * 256, tbuf, ED_PAGE_SIZE);
if (bcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0)
msize += ED_PAGE_SIZE;
else {
break;
}
} else {
break;
}
}
if (msize == 0) {
device_printf(dev,
"Cannot find any RAM, start : %d, x = %d.\n",
(int)mstart, x);
return (ENXIO);
}
if (bootverbose)
device_printf(dev,
"RAM start at %d, size : %d.\n", (int)mstart, msize);
sc->mem_size = msize;
sc->mem_start = mstart;
sc->mem_end = msize + mstart;
sc->tx_page_start = mstart / ED_PAGE_SIZE;
return 0;
}
void
ed_Novell_read_mac(struct ed_softc *sc)
{
int n;
uint8_t romdata[16];
/*
* Most ne1000/ne2000 compatible cards have their MAC address
* located in the first few words of the address space. This seems
* universally true for ISA and PCI implementations, but PC Card
* devices seem to have more variance.
*/
ed_pio_readmem(sc, 0, romdata, 16);
for (n = 0; n < ETHER_ADDR_LEN; n++)
sc->enaddr[n] = romdata[n * (sc->isa16bit + 1)];
}

File diff suppressed because it is too large Load diff

View file

@ -1,149 +0,0 @@
/*-
* SPDX-License-Identifier: BSD-4-Clause
*
* Copyright (c) 1996 Stefan Esser <se@freebsd.org>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice immediately at the beginning of the file, without modification,
* this list of conditions, and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Absolutely no warranty of function or purpose is made by the author
* Stefan Esser.
* 4. Modifications may be freely made to this file if the above conditions
* are met.
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/socket.h>
#include <sys/kernel.h>
#include <sys/module.h>
#include <sys/bus.h>
#include <machine/bus.h>
#include <sys/rman.h>
#include <machine/resource.h>
#include <net/if.h>
#include <net/if_arp.h>
#include <net/if_media.h>
#include <net/if_mib.h>
#include <dev/pci/pcireg.h>
#include <dev/pci/pcivar.h>
#include <dev/ed/if_edvar.h>
#include <dev/ed/rtl80x9reg.h>
static struct _pcsid
{
uint32_t type;
const char *desc;
} pci_ids[] =
{
{ 0x140111f6, "Compex RL2000" },
{ 0x005812c3, "Holtek HT80232" },
{ 0x30008e2e, "KTI ET32P2" },
{ 0x50004a14, "NetVin NV5000SC" },
{ 0x09401050, "ProLAN" },
{ ED_RTL8029_PCI_ID, "RealTek 8029" }, /* Needs realtek full duplex */
{ 0x0e3410bd, "Surecom NE-34" },
{ 0x09261106, "VIA VT86C926" },
{ 0x19808c4a, "Winbond W89C940" },
{ 0x5a5a1050, "Winbond W89C940F" },
#if 0
/* some Holtek needs special lovin', disabled by default */
/* The Holtek can report/do full duplex, but that's unimplemented */
{ 0x559812c3, "Holtek HT80229" }, /* Only 32-bit I/O, Holtek fdx, STOP_PG_60? */
#endif
{ 0x00000000, NULL }
};
static int ed_pci_probe(device_t);
static int ed_pci_attach(device_t);
static int
ed_pci_probe(device_t dev)
{
uint32_t type = pci_get_devid(dev);
struct _pcsid *ep =pci_ids;
while (ep->type && ep->type != type)
++ep;
if (ep->desc == NULL)
return (ENXIO);
device_set_desc(dev, ep->desc);
return (BUS_PROBE_DEFAULT);
}
static int
ed_pci_attach(device_t dev)
{
struct ed_softc *sc = device_get_softc(dev);
int error = ENXIO;
/*
* Probe RTL8029 cards, but allow failure and try as a generic
* ne-2000. QEMU 0.9 and earlier use the RTL8029 PCI ID, but
* are areally just generic ne-2000 cards.
*/
if (pci_get_devid(dev) == ED_RTL8029_PCI_ID)
error = ed_probe_RTL80x9(dev, PCIR_BAR(0), 0);
if (error)
error = ed_probe_Novell(dev, PCIR_BAR(0),
ED_FLAGS_FORCE_16BIT_MODE);
if (error) {
ed_release_resources(dev);
return (error);
}
ed_Novell_read_mac(sc);
error = ed_alloc_irq(dev, 0, RF_SHAREABLE);
if (error) {
ed_release_resources(dev);
return (error);
}
if (sc->sc_media_ioctl == NULL)
ed_gen_ifmedia_init(sc);
error = ed_attach(dev);
if (error) {
ed_release_resources(dev);
return (error);
}
error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET | INTR_MPSAFE,
NULL, edintr, sc, &sc->irq_handle);
if (error)
ed_release_resources(dev);
return (error);
}
static device_method_t ed_pci_methods[] = {
/* Device interface */
DEVMETHOD(device_probe, ed_pci_probe),
DEVMETHOD(device_attach, ed_pci_attach),
DEVMETHOD(device_detach, ed_detach),
{ 0, 0 }
};
static driver_t ed_pci_driver = {
"ed",
ed_pci_methods,
sizeof(struct ed_softc),
};
DRIVER_MODULE(ed, pci, ed_pci_driver, ed_devclass, 0, 0);
MODULE_DEPEND(ed, pci, 1, 1, 1);
MODULE_DEPEND(ed, ether, 1, 1, 1);
MODULE_PNP_INFO("W32:vendor/device;D:#", pci, ed, pci_ids,
nitems(pci_ids) - 1);

View file

@ -1,227 +0,0 @@
/*-
* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
*
* Copyright (c) 2003, David Madole
* All rights reserved.
* Copyright (c) 2005, M. Warner Losh.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice unmodified, this list of conditions, and the following
* disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* Based on patches subitted by: David Madole, edited by M. Warner Losh.
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include "opt_ed.h"
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/sockio.h>
#include <sys/mbuf.h>
#include <sys/kernel.h>
#include <sys/socket.h>
#include <sys/syslog.h>
#include <sys/bus.h>
#include <machine/bus.h>
#include <sys/rman.h>
#include <machine/resource.h>
#include <net/ethernet.h>
#include <net/if.h>
#include <net/if_var.h>
#include <net/if_arp.h>
#include <net/if_dl.h>
#include <net/if_mib.h>
#include <net/if_media.h>
#include <net/bpf.h>
#include <dev/ed/if_edreg.h>
#include <dev/ed/if_edvar.h>
#include <dev/ed/rtl80x9reg.h>
static int ed_rtl_set_media(struct ifnet *ifp);
static void ed_rtl_get_media(struct ifnet *ifp, struct ifmediareq *);
static int
ed_rtl80x9_media_ioctl(struct ed_softc *sc, struct ifreq *ifr, u_long command)
{
return (ifmedia_ioctl(sc->ifp, ifr, &sc->ifmedia, command));
}
int
ed_probe_RTL80x9(device_t dev, int port_rid, int flags)
{
struct ed_softc *sc = device_get_softc(dev);
char *ts;
int error;
if ((error = ed_alloc_port(dev, port_rid, ED_NOVELL_IO_PORTS)))
return (error);
sc->asic_offset = ED_NOVELL_ASIC_OFFSET;
sc->nic_offset = ED_NOVELL_NIC_OFFSET;
if (ed_nic_inb(sc, ED_P0_CR) & (ED_CR_PS0 | ED_CR_PS1))
ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STP);
if (ed_nic_inb(sc, ED_RTL80X9_80X9ID0) != ED_RTL80X9_ID0)
return (ENXIO);
switch (ed_nic_inb(sc, ED_RTL80X9_80X9ID1)) {
case ED_RTL8019_ID1:
sc->chip_type = ED_CHIP_TYPE_RTL8019;
ts = "RTL8019";
break;
case ED_RTL8029_ID1:
sc->chip_type = ED_CHIP_TYPE_RTL8029;
ts = "RTL8029";
break;
default:
return (ENXIO);
}
if ((error = ed_probe_Novell_generic(dev, flags)))
return (error);
sc->type_str = ts;
sc->sc_media_ioctl = &ed_rtl80x9_media_ioctl;
ifmedia_init(&sc->ifmedia, 0, ed_rtl_set_media, ed_rtl_get_media);
ifmedia_add(&sc->ifmedia, IFM_ETHER | IFM_10_T | IFM_FDX, 0, 0);
ifmedia_add(&sc->ifmedia, IFM_ETHER | IFM_10_T, 0, 0);
ifmedia_add(&sc->ifmedia, IFM_ETHER | IFM_10_2, 0, 0);
ifmedia_add(&sc->ifmedia, IFM_ETHER | IFM_10_5, 0, 0);
ifmedia_add(&sc->ifmedia, IFM_ETHER | IFM_AUTO, 0, 0);
ed_nic_barrier(sc, ED_P0_CR, 1,
BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_PAGE_3 | ED_CR_STP);
ed_nic_barrier(sc, ED_P0_CR, 1,
BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
switch (ed_nic_inb(sc, ED_RTL80X9_CONFIG2) & ED_RTL80X9_CF2_MEDIA) {
case ED_RTL80X9_CF2_AUTO:
ifmedia_set(&sc->ifmedia, IFM_ETHER | IFM_AUTO);
break;
case ED_RTL80X9_CF2_10_5:
ifmedia_set(&sc->ifmedia, IFM_ETHER | IFM_10_5);
break;
case ED_RTL80X9_CF2_10_2:
ifmedia_set(&sc->ifmedia, IFM_ETHER | IFM_10_2);
break;
case ED_RTL80X9_CF2_10_T:
ifmedia_set(&sc->ifmedia, IFM_ETHER | IFM_10_T |
((ed_nic_inb(sc, ED_RTL80X9_CONFIG3)
& ED_RTL80X9_CF3_FUDUP) ? IFM_FDX : 0));
break;
}
return (0);
}
static int
ed_rtl_set_media(struct ifnet *ifp)
{
struct ed_softc *sc;
sc = ifp->if_softc;
ED_LOCK(sc);
ed_nic_barrier(sc, ED_P0_CR, 1,
BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_PAGE_3
| (ed_nic_inb(sc, ED_P0_CR) & (ED_CR_STA | ED_CR_STP)));
ed_nic_barrier(sc, ED_P0_CR, 1,
BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
switch(IFM_SUBTYPE(sc->ifmedia.ifm_cur->ifm_media)) {
case IFM_10_T:
ed_nic_outb(sc, ED_RTL80X9_CONFIG2, ED_RTL80X9_CF2_10_T
| (ed_nic_inb(sc, ED_RTL80X9_CONFIG2)
& ~ED_RTL80X9_CF2_MEDIA));
break;
case IFM_10_2:
ed_nic_outb(sc, ED_RTL80X9_CONFIG2, ED_RTL80X9_CF2_10_2
| (ed_nic_inb(sc, ED_RTL80X9_CONFIG2)
& ~ED_RTL80X9_CF2_MEDIA));
break;
case IFM_10_5:
ed_nic_outb(sc, ED_RTL80X9_CONFIG2, ED_RTL80X9_CF2_10_5
| (ed_nic_inb(sc, ED_RTL80X9_CONFIG2)
& ~ED_RTL80X9_CF2_MEDIA));
break;
case IFM_AUTO:
ed_nic_outb(sc, ED_RTL80X9_CONFIG2, ED_RTL80X9_CF2_AUTO
| (ed_nic_inb(sc, ED_RTL80X9_CONFIG2)
& ~ED_RTL80X9_CF2_MEDIA));
break;
}
ed_nic_outb(sc, ED_RTL80X9_CONFIG3,
(sc->ifmedia.ifm_cur->ifm_media & IFM_FDX) ?
(ed_nic_inb(sc, ED_RTL80X9_CONFIG3) | ED_RTL80X9_CF3_FUDUP) :
(ed_nic_inb(sc, ED_RTL80X9_CONFIG3) & ~ED_RTL80X9_CF3_FUDUP));
ED_UNLOCK(sc);
return (0);
}
static void
ed_rtl_get_media(struct ifnet *ifp, struct ifmediareq *imr)
{
struct ed_softc *sc;
sc = ifp->if_softc;
imr->ifm_active = sc->ifmedia.ifm_cur->ifm_media;
if (IFM_SUBTYPE(imr->ifm_active) == IFM_AUTO) {
ED_LOCK(sc);
ed_nic_barrier(sc, ED_P0_CR, 1,
BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_PAGE_3 |
(ed_nic_inb(sc, ED_P0_CR) & (ED_CR_STA | ED_CR_STP)));
ed_nic_barrier(sc, ED_P0_CR, 1,
BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
switch (ed_nic_inb(sc, ED_RTL80X9_CONFIG0)
& (sc->chip_type == ED_CHIP_TYPE_RTL8029 ? ED_RTL80X9_CF0_BNC
: (ED_RTL80X9_CF0_AUI | ED_RTL80X9_CF0_BNC))) {
case ED_RTL80X9_CF0_BNC:
imr->ifm_active |= IFM_10_2;
break;
case ED_RTL80X9_CF0_AUI:
imr->ifm_active |= IFM_10_5;
break;
default:
imr->ifm_active |= IFM_10_T;
break;
}
ED_UNLOCK(sc);
}
imr->ifm_status = 0;
}

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@ -1,159 +0,0 @@
/*-
* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
*
* Copyright (c) 2005, M. Warner Losh
* All rights reserved.
* Copyright (c) 1995, David Greenman
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice unmodified, this list of conditions, and the following
* disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include "opt_ed.h"
#ifdef ED_SIC
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/sockio.h>
#include <sys/mbuf.h>
#include <sys/kernel.h>
#include <sys/socket.h>
#include <sys/syslog.h>
#include <sys/bus.h>
#include <machine/bus.h>
#include <sys/rman.h>
#include <machine/resource.h>
#include <net/ethernet.h>
#include <net/if.h>
#include <net/if_arp.h>
#include <net/if_dl.h>
#include <net/if_mib.h>
#include <net/if_media.h>
#include <net/bpf.h>
#include <dev/ed/if_edreg.h>
#include <dev/ed/if_edvar.h>
/*
* Probe and vendor-specific initialization routine for SIC boards
*/
int
ed_probe_SIC(device_t dev, int port_rid, int flags)
{
struct ed_softc *sc = device_get_softc(dev);
int error;
int i;
u_int memsize;
u_long pmem;
u_char sum;
error = ed_alloc_port(dev, 0, ED_SIC_IO_PORTS);
if (error)
return (error);
sc->asic_offset = ED_SIC_ASIC_OFFSET;
sc->nic_offset = ED_SIC_NIC_OFFSET;
memsize = 16384;
/* XXX Needs to allow different msize */
error = ed_alloc_memory(dev, 0, memsize);
if (error)
return (error);
sc->mem_start = 0;
sc->mem_size = memsize;
pmem = rman_get_start(sc->mem_res);
error = ed_isa_mem_ok(dev, pmem, memsize);
if (error)
return (error);
/* Reset card to force it into a known state. */
ed_asic_outb(sc, 0, 0x00);
DELAY(100);
/*
* Here we check the card ROM, if the checksum passes, and the
* type code and ethernet address check out, then we know we have
* an SIC card.
*/
ed_asic_outb(sc, 0, 0x81);
DELAY(100);
sum = bus_space_read_1(sc->mem_bst, sc->mem_bsh, 6);
for (i = 0; i < ETHER_ADDR_LEN; i++)
sum ^= (sc->enaddr[i] =
bus_space_read_1(sc->mem_bst, sc->mem_bsh, i));
#ifdef ED_DEBUG
device_printf(dev, "ed_probe_sic: got address %6D\n",
sc->enaddr, ":");
#endif
if (sum != 0)
return (ENXIO);
if ((sc->enaddr[0] | sc->enaddr[1] | sc->enaddr[2]) == 0)
return (ENXIO);
sc->vendor = ED_VENDOR_SIC;
sc->type_str = "SIC";
sc->isa16bit = 0;
sc->cr_proto = 0;
/*
* SIC RAM page 0x0000-0x3fff(or 0x7fff)
*/
ed_asic_outb(sc, 0, 0x80);
DELAY(100);
error = ed_clear_memory(dev);
if (error)
return (error);
sc->mem_shared = 1;
sc->mem_end = sc->mem_start + sc->mem_size;
/*
* allocate one xmit buffer if < 16k, two buffers otherwise
*/
if ((sc->mem_size < 16384) || (flags & ED_FLAGS_NO_MULTI_BUFFERING))
sc->txb_cnt = 1;
else
sc->txb_cnt = 2;
sc->tx_page_start = 0;
sc->rec_page_start = sc->tx_page_start + ED_TXBUF_SIZE * sc->txb_cnt;
sc->rec_page_stop = sc->tx_page_start + sc->mem_size / ED_PAGE_SIZE;
sc->mem_ring = sc->mem_start + sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE;
sc->sc_write_mbufs = ed_shmem_write_mbufs;
return (0);
}
#endif /* ED_SIC */

View file

@ -1,453 +0,0 @@
/*-
* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
*
* Copyright (c) 2005, M. Warner Losh
* All rights reserved.
* Copyright (c) 1995, David Greenman
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice unmodified, this list of conditions, and the following
* disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include "opt_ed.h"
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/sockio.h>
#include <sys/mbuf.h>
#include <sys/kernel.h>
#include <sys/socket.h>
#include <sys/syslog.h>
#include <sys/bus.h>
#include <machine/bus.h>
#include <sys/rman.h>
#include <machine/resource.h>
#include <net/ethernet.h>
#include <net/if.h>
#include <net/if_arp.h>
#include <net/if_dl.h>
#include <net/if_mib.h>
#include <net/if_media.h>
#include <net/bpf.h>
#include <dev/ed/if_edreg.h>
#include <dev/ed/if_edvar.h>
/*
* Interrupt conversion table for WD/SMC ASIC/83C584
*/
static uint16_t ed_intr_val[] = {
9,
3,
5,
7,
10,
11,
15,
4
};
/*
* Interrupt conversion table for 83C790
*/
static uint16_t ed_790_intr_val[] = {
0,
9,
3,
5,
7,
10,
11,
15
};
/*
* Probe and vendor-specific initialization routine for SMC/WD80x3 boards
*/
int
ed_probe_WD80x3_generic(device_t dev, int flags, uint16_t *intr_vals[])
{
struct ed_softc *sc = device_get_softc(dev);
int error;
int i;
u_int memsize;
u_char iptr, isa16bit, sum, totalsum;
rman_res_t irq, junk, pmem;
sc->chip_type = ED_CHIP_TYPE_DP8390;
if (ED_FLAGS_GETTYPE(flags) == ED_FLAGS_TOSH_ETHER) {
totalsum = ED_WD_ROM_CHECKSUM_TOTAL_TOSH_ETHER;
ed_asic_outb(sc, ED_WD_MSR, ED_WD_MSR_POW);
DELAY(10000);
}
else
totalsum = ED_WD_ROM_CHECKSUM_TOTAL;
/*
* Attempt to do a checksum over the station address PROM. If it
* fails, it's probably not a SMC/WD board. There is a problem with
* this, though: some clone WD boards don't pass the checksum test.
* Danpex boards for one.
*/
for (sum = 0, i = 0; i < 8; ++i)
sum += ed_asic_inb(sc, ED_WD_PROM + i);
if (sum != totalsum) {
/*
* Checksum is invalid. This often happens with cheap WD8003E
* clones. In this case, the checksum byte (the eighth byte)
* seems to always be zero.
*/
if (ed_asic_inb(sc, ED_WD_CARD_ID) != ED_TYPE_WD8003E ||
ed_asic_inb(sc, ED_WD_PROM + 7) != 0)
return (ENXIO);
}
/* reset card to force it into a known state. */
if (ED_FLAGS_GETTYPE(flags) == ED_FLAGS_TOSH_ETHER)
ed_asic_outb(sc, ED_WD_MSR, ED_WD_MSR_RST | ED_WD_MSR_POW);
else
ed_asic_outb(sc, ED_WD_MSR, ED_WD_MSR_RST);
DELAY(100);
ed_asic_outb(sc, ED_WD_MSR, ed_asic_inb(sc, ED_WD_MSR) & ~ED_WD_MSR_RST);
/* wait in the case this card is reading its EEROM */
DELAY(5000);
sc->vendor = ED_VENDOR_WD_SMC;
sc->type = ed_asic_inb(sc, ED_WD_CARD_ID);
/*
* Set initial values for width/size.
*/
memsize = 8192;
isa16bit = 0;
switch (sc->type) {
case ED_TYPE_WD8003S:
sc->type_str = "WD8003S";
break;
case ED_TYPE_WD8003E:
sc->type_str = "WD8003E";
break;
case ED_TYPE_WD8003EB:
sc->type_str = "WD8003EB";
break;
case ED_TYPE_WD8003W:
sc->type_str = "WD8003W";
break;
case ED_TYPE_WD8013EBT:
sc->type_str = "WD8013EBT";
memsize = 16384;
isa16bit = 1;
break;
case ED_TYPE_WD8013W:
sc->type_str = "WD8013W";
memsize = 16384;
isa16bit = 1;
break;
case ED_TYPE_WD8013EP: /* also WD8003EP */
if (ed_asic_inb(sc, ED_WD_ICR) & ED_WD_ICR_16BIT) {
isa16bit = 1;
memsize = 16384;
sc->type_str = "WD8013EP";
} else
sc->type_str = "WD8003EP";
break;
case ED_TYPE_WD8013WC:
sc->type_str = "WD8013WC";
memsize = 16384;
isa16bit = 1;
break;
case ED_TYPE_WD8013EBP:
sc->type_str = "WD8013EBP";
memsize = 16384;
isa16bit = 1;
break;
case ED_TYPE_WD8013EPC:
sc->type_str = "WD8013EPC";
memsize = 16384;
isa16bit = 1;
break;
case ED_TYPE_SMC8216C: /* 8216 has 16K shared mem -- 8416 has 8K */
case ED_TYPE_SMC8216T:
if (sc->type == ED_TYPE_SMC8216C)
sc->type_str = "SMC8216/SMC8216C";
else
sc->type_str = "SMC8216T";
ed_asic_outb(sc, ED_WD790_HWR,
ed_asic_inb(sc, ED_WD790_HWR) | ED_WD790_HWR_SWH);
switch (ed_asic_inb(sc, ED_WD790_RAR) & ED_WD790_RAR_SZ64) {
case ED_WD790_RAR_SZ64:
memsize = 65536;
break;
case ED_WD790_RAR_SZ32:
memsize = 32768;
break;
case ED_WD790_RAR_SZ16:
memsize = 16384;
break;
case ED_WD790_RAR_SZ8:
/* 8216 has 16K shared mem -- 8416 has 8K */
if (sc->type == ED_TYPE_SMC8216C)
sc->type_str = "SMC8416C/SMC8416BT";
else
sc->type_str = "SMC8416T";
memsize = 8192;
break;
}
ed_asic_outb(sc, ED_WD790_HWR,
ed_asic_inb(sc, ED_WD790_HWR) & ~ED_WD790_HWR_SWH);
isa16bit = 1;
sc->chip_type = ED_CHIP_TYPE_WD790;
break;
case ED_TYPE_TOSHIBA1:
sc->type_str = "Toshiba1";
memsize = 32768;
isa16bit = 1;
break;
case ED_TYPE_TOSHIBA4:
sc->type_str = "Toshiba4";
memsize = 32768;
isa16bit = 1;
break;
default:
sc->type_str = "";
break;
}
/*
* Make some adjustments to initial values depending on what is found
* in the ICR.
*/
if (isa16bit && (sc->type != ED_TYPE_WD8013EBT)
&& (sc->type != ED_TYPE_TOSHIBA1) && (sc->type != ED_TYPE_TOSHIBA4)
&& ((ed_asic_inb(sc, ED_WD_ICR) & ED_WD_ICR_16BIT) == 0)) {
isa16bit = 0;
memsize = 8192;
}
/* Override memsize? XXX */
error = ed_alloc_memory(dev, 0, memsize);
if (error)
return (error);
sc->mem_start = 0;
#ifdef ED_DEBUG
printf("type = %x type_str=%s isa16bit=%d memsize=%d id_msize=%lu\n",
sc->type, sc->type_str, isa16bit, memsize,
rman_get_size(sc->mem_res));
for (i = 0; i < 8; i++)
printf("%x -> %x\n", i, ed_asic_inb(sc, i));
#endif
pmem = rman_get_start(sc->mem_res);
if (!(flags & ED_FLAGS_PCCARD)) {
error = ed_isa_mem_ok(dev, pmem, memsize);
if (error)
return (error);
}
/*
* (note that if the user specifies both of the following flags that
* '8bit' mode intentionally has precedence)
*/
if (flags & ED_FLAGS_FORCE_16BIT_MODE)
isa16bit = 1;
if (flags & ED_FLAGS_FORCE_8BIT_MODE)
isa16bit = 0;
/*
* If possible, get the assigned interrupt number from the card and
* use it.
*/
if ((sc->type & ED_WD_SOFTCONFIG) &&
(sc->chip_type != ED_CHIP_TYPE_WD790)) {
/*
* Assemble together the encoded interrupt number.
*/
iptr = (ed_asic_inb(sc, ED_WD_ICR) & ED_WD_ICR_IR2) |
((ed_asic_inb(sc, ED_WD_IRR) &
(ED_WD_IRR_IR0 | ED_WD_IRR_IR1)) >> 5);
/*
* If no interrupt specified (or "?"), use what the board tells us.
*/
error = bus_get_resource(dev, SYS_RES_IRQ, 0, &irq, &junk);
if (error && intr_vals[0] != NULL)
error = bus_set_resource(dev, SYS_RES_IRQ, 0,
intr_vals[0][iptr], 1);
if (error)
return (error);
/*
* Enable the interrupt.
*/
ed_asic_outb(sc, ED_WD_IRR,
ed_asic_inb(sc, ED_WD_IRR) | ED_WD_IRR_IEN);
}
if (sc->chip_type == ED_CHIP_TYPE_WD790) {
ed_asic_outb(sc, ED_WD790_HWR,
ed_asic_inb(sc, ED_WD790_HWR) | ED_WD790_HWR_SWH);
iptr = (((ed_asic_inb(sc, ED_WD790_GCR) & ED_WD790_GCR_IR2) >> 4) |
(ed_asic_inb(sc, ED_WD790_GCR) &
(ED_WD790_GCR_IR1 | ED_WD790_GCR_IR0)) >> 2);
ed_asic_outb(sc, ED_WD790_HWR,
ed_asic_inb(sc, ED_WD790_HWR) & ~ED_WD790_HWR_SWH);
/*
* If no interrupt specified (or "?"), use what the board tells us.
*/
error = bus_get_resource(dev, SYS_RES_IRQ, 0, &irq, &junk);
if (error && intr_vals[1] != NULL)
error = bus_set_resource(dev, SYS_RES_IRQ, 0,
intr_vals[1][iptr], 1);
if (error)
return (error);
/*
* Enable interrupts.
*/
ed_asic_outb(sc, ED_WD790_ICR,
ed_asic_inb(sc, ED_WD790_ICR) | ED_WD790_ICR_EIL);
}
error = bus_get_resource(dev, SYS_RES_IRQ, 0, &irq, &junk);
if (error) {
device_printf(dev, "%s cards don't support auto-detected/assigned interrupts.\n",
sc->type_str);
return (ENXIO);
}
sc->isa16bit = isa16bit;
sc->mem_shared = 1;
/*
* allocate one xmit buffer if < 16k, two buffers otherwise
*/
if (memsize < 16384 || (flags & ED_FLAGS_NO_MULTI_BUFFERING))
sc->txb_cnt = 1;
else
sc->txb_cnt = 2;
sc->tx_page_start = ED_WD_PAGE_OFFSET;
sc->rec_page_start = ED_WD_PAGE_OFFSET + ED_TXBUF_SIZE * sc->txb_cnt;
sc->rec_page_stop = ED_WD_PAGE_OFFSET + memsize / ED_PAGE_SIZE;
sc->mem_ring = sc->mem_start + (ED_PAGE_SIZE * sc->rec_page_start);
sc->mem_size = memsize;
sc->mem_end = sc->mem_start + memsize;
/*
* Get station address from on-board ROM
*/
for (i = 0; i < ETHER_ADDR_LEN; ++i)
sc->enaddr[i] = ed_asic_inb(sc, ED_WD_PROM + i);
/*
* Set upper address bits and 8/16 bit access to shared memory.
*/
if (isa16bit) {
if (sc->chip_type == ED_CHIP_TYPE_WD790)
sc->wd_laar_proto = ed_asic_inb(sc, ED_WD_LAAR);
else
sc->wd_laar_proto = ED_WD_LAAR_L16EN |
((pmem >> 19) & ED_WD_LAAR_ADDRHI);
/*
* Enable 16bit access
*/
ed_asic_outb(sc, ED_WD_LAAR, sc->wd_laar_proto |
ED_WD_LAAR_M16EN);
} else {
if (((sc->type & ED_WD_SOFTCONFIG) ||
(sc->type == ED_TYPE_TOSHIBA1) ||
(sc->type == ED_TYPE_TOSHIBA4) ||
(sc->type == ED_TYPE_WD8013EBT)) &&
(sc->chip_type != ED_CHIP_TYPE_WD790)) {
sc->wd_laar_proto = (pmem >> 19) &
ED_WD_LAAR_ADDRHI;
ed_asic_outb(sc, ED_WD_LAAR, sc->wd_laar_proto);
}
}
/*
* Set address and enable interface shared memory.
*/
if (sc->chip_type != ED_CHIP_TYPE_WD790) {
if (ED_FLAGS_GETTYPE(flags) == ED_FLAGS_TOSH_ETHER) {
ed_asic_outb(sc, ED_WD_MSR + 1,
((pmem >> 8) & 0xe0) | 4);
ed_asic_outb(sc, ED_WD_MSR + 2, ((pmem >> 16) & 0x0f));
ed_asic_outb(sc, ED_WD_MSR,
ED_WD_MSR_MENB | ED_WD_MSR_POW);
} else {
ed_asic_outb(sc, ED_WD_MSR, ((pmem >> 13) &
ED_WD_MSR_ADDR) | ED_WD_MSR_MENB);
}
sc->cr_proto = ED_CR_RD2;
} else {
ed_asic_outb(sc, ED_WD_MSR, ED_WD_MSR_MENB);
ed_asic_outb(sc, ED_WD790_HWR,
(ed_asic_inb(sc, ED_WD790_HWR) | ED_WD790_HWR_SWH));
ed_asic_outb(sc, ED_WD790_RAR,
((pmem >> 13) & 0x0f) | ((pmem >> 11) & 0x40) |
(ed_asic_inb(sc, ED_WD790_RAR) & 0xb0));
ed_asic_outb(sc, ED_WD790_HWR,
(ed_asic_inb(sc, ED_WD790_HWR) & ~ED_WD790_HWR_SWH));
sc->cr_proto = 0;
}
/*
* Disable 16bit access to shared memory - we leave it
* disabled so that 1) machines reboot properly when the board
* is set 16 bit mode and there are conflicting 8bit
* devices/ROMS in the same 128k address space as this boards
* shared memory. and 2) so that other 8 bit devices with
* shared memory can be used in this 128k region, too.
*/
error = ed_clear_memory(dev);
ed_disable_16bit_access(sc);
sc->sc_write_mbufs = ed_shmem_write_mbufs;
return (error);
}
int
ed_probe_WD80x3(device_t dev, int port_rid, int flags)
{
struct ed_softc *sc = device_get_softc(dev);
int error;
static uint16_t *intr_vals[] = {ed_intr_val, ed_790_intr_val};
error = ed_alloc_port(dev, port_rid, ED_WD_IO_PORTS);
if (error)
return (error);
sc->asic_offset = ED_WD_ASIC_OFFSET;
sc->nic_offset = ED_WD_NIC_OFFSET;
return ed_probe_WD80x3_generic(dev, flags, intr_vals);
}

File diff suppressed because it is too large Load diff

View file

@ -1,304 +0,0 @@
/*-
* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
*
* Copyright (c) 1995, David Greenman
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice unmodified, this list of conditions, and the following
* disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
#ifndef SYS_DEV_ED_IF_EDVAR_H
#define SYS_DEV_ED_IF_EDVAR_H
#include <dev/mii/mii_bitbang.h>
/*
* ed_softc: per line info and status
*/
struct ed_softc {
struct ifnet *ifp;
struct ifmedia ifmedia; /* Media info */
device_t dev;
struct mtx sc_mtx;
char *type_str; /* pointer to type string */
u_char vendor; /* interface vendor */
u_char type; /* interface type code */
u_char chip_type; /* the type of chip (one of ED_CHIP_TYPE_*) */
u_char isa16bit; /* width of access to card 0=8 or 1=16 */
u_char mem_shared; /* NIC memory is shared with host */
u_char xmit_busy; /* transmitter is busy */
u_char enaddr[6];
int port_used; /* nonzero if ports used */
struct resource* port_res; /* resource for port range */
struct resource* port_res2; /* resource for port range */
bus_space_tag_t port_bst;
bus_space_handle_t port_bsh;
int mem_used; /* nonzero if memory used */
struct resource* mem_res; /* resource for memory range */
bus_space_tag_t mem_bst;
bus_space_handle_t mem_bsh;
struct resource* irq_res; /* resource for irq */
void* irq_handle; /* handle for irq handler */
int (*sc_media_ioctl)(struct ed_softc *sc, struct ifreq *ifr,
u_long command);
void (*sc_mediachg)(struct ed_softc *);
device_t miibus; /* MII bus for cards with MII. */
mii_bitbang_ops_t mii_bitbang_ops;
struct callout tick_ch;
void (*sc_tick)(struct ed_softc *);
void (*readmem)(struct ed_softc *sc, bus_size_t src, uint8_t *dst,
uint16_t amount);
u_short (*sc_write_mbufs)(struct ed_softc *, struct mbuf *, bus_size_t);
int tx_timer;
int nic_offset; /* NIC (DS8390) I/O bus address offset */
int asic_offset; /* ASIC I/O bus address offset */
/*
* The following 'proto' variable is part of a work-around for 8013EBT asics
* being write-only. It's sort of a prototype/shadow of the real thing.
*/
u_char wd_laar_proto;
u_char cr_proto;
/*
* HP PC LAN PLUS card support.
*/
u_short hpp_options; /* flags controlling behaviour of the HP card */
u_short hpp_id; /* software revision and other fields */
caddr_t hpp_mem_start; /* Memory-mapped IO register address */
bus_size_t mem_start; /* NIC memory start address */
bus_size_t mem_end; /* NIC memory end address */
uint32_t mem_size; /* total NIC memory size */
bus_size_t mem_ring; /* start of RX ring-buffer (in NIC mem) */
u_char txb_cnt; /* number of transmit buffers */
u_char txb_inuse; /* number of TX buffers currently in-use */
u_char txb_new; /* pointer to where new buffer will be added */
u_char txb_next_tx; /* pointer to next buffer ready to xmit */
u_short txb_len[8]; /* buffered xmit buffer lengths */
u_char tx_page_start; /* first page of TX buffer area */
u_char rec_page_start; /* first page of RX ring-buffer */
u_char rec_page_stop; /* last page of RX ring-buffer */
u_char next_packet; /* pointer to next unread RX packet */
u_int tx_mem; /* Total amount of RAM for tx */
u_int rx_mem; /* Total amount of RAM for rx */
struct ifmib_iso_8802_3 mibdata; /* stuff for network mgmt */
};
#define ed_nic_barrier(sc, port, length, flags) \
bus_space_barrier(sc->port_bst, sc->port_bsh, \
(sc)->nic_offset + (port), (length), (flags))
#define ed_nic_inb(sc, port) \
bus_space_read_1(sc->port_bst, sc->port_bsh, (sc)->nic_offset + (port))
#define ed_nic_outb(sc, port, value) \
bus_space_write_1(sc->port_bst, sc->port_bsh, \
(sc)->nic_offset + (port), (value))
#define ed_nic_inw(sc, port) \
bus_space_read_2(sc->port_bst, sc->port_bsh, (sc)->nic_offset + (port))
#define ed_nic_outw(sc, port, value) \
bus_space_write_2(sc->port_bst, sc->port_bsh, \
(sc)->nic_offset + (port), (value))
#define ed_nic_insb(sc, port, addr, count) \
bus_space_read_multi_1(sc->port_bst, sc->port_bsh, \
(sc)->nic_offset + (port), (addr), (count))
#define ed_nic_outsb(sc, port, addr, count) \
bus_space_write_multi_1(sc->port_bst, sc->port_bsh, \
(sc)->nic_offset + (port), (addr), (count))
#define ed_nic_insw(sc, port, addr, count) \
bus_space_read_multi_2(sc->port_bst, sc->port_bsh, \
(sc)->nic_offset + (port), (uint16_t *)(addr), (count))
#define ed_nic_outsw(sc, port, addr, count) \
bus_space_write_multi_2(sc->port_bst, sc->port_bsh, \
(sc)->nic_offset + (port), (uint16_t *)(addr), (count))
#define ed_nic_insl(sc, port, addr, count) \
bus_space_read_multi_4(sc->port_bst, sc->port_bsh, \
(sc)->nic_offset + (port), (uint32_t *)(addr), (count))
#define ed_nic_outsl(sc, port, addr, count) \
bus_space_write_multi_4(sc->port_bst, sc->port_bsh, \
(sc)->nic_offset + (port), (uint32_t *)(addr), (count))
#define ed_asic_barrier(sc, port, length, flags) \
bus_space_barrier(sc->port_bst, sc->port_bsh, \
(sc)->asic_offset + (port), (length), (flags))
#define ed_asic_inb(sc, port) \
bus_space_read_1(sc->port_bst, sc->port_bsh, \
(sc)->asic_offset + (port))
#define ed_asic_outb(sc, port, value) \
bus_space_write_1(sc->port_bst, sc->port_bsh, \
(sc)->asic_offset + (port), (value))
#define ed_asic_inw(sc, port) \
bus_space_read_2(sc->port_bst, sc->port_bsh, \
(sc)->asic_offset + (port))
#define ed_asic_outw(sc, port, value) \
bus_space_write_2(sc->port_bst, sc->port_bsh, \
(sc)->asic_offset + (port), (value))
#define ed_asic_insb(sc, port, addr, count) \
bus_space_read_multi_1(sc->port_bst, sc->port_bsh, \
(sc)->asic_offset + (port), (addr), (count))
#define ed_asic_outsb(sc, port, addr, count) \
bus_space_write_multi_1(sc->port_bst, sc->port_bsh, \
(sc)->asic_offset + (port), (addr), (count))
#define ed_asic_insw(sc, port, addr, count) \
bus_space_read_multi_2(sc->port_bst, sc->port_bsh, \
(sc)->asic_offset + (port), (uint16_t *)(addr), (count))
#define ed_asic_outsw(sc, port, addr, count) \
bus_space_write_multi_2(sc->port_bst, sc->port_bsh, \
(sc)->asic_offset + (port), (uint16_t *)(addr), (count))
#define ed_asic_insl(sc, port, addr, count) \
bus_space_read_multi_4(sc->port_bst, sc->port_bsh, \
(sc)->asic_offset + (port), (uint32_t *)(addr), (count))
#define ed_asic_outsl(sc, port, addr, count) \
bus_space_write_multi_4(sc->port_bst, sc->port_bsh, \
(sc)->asic_offset + (port), (uint32_t *)(addr), (count))
void ed_release_resources(device_t);
int ed_alloc_port(device_t, int, int);
int ed_alloc_memory(device_t, int, int);
int ed_alloc_irq(device_t, int, int);
int ed_probe_generic8390(struct ed_softc *);
int ed_probe_WD80x3(device_t, int, int);
int ed_probe_WD80x3_generic(device_t, int, uint16_t *[]);
int ed_probe_RTL80x9(device_t, int, int);
#ifdef ED_3C503
int ed_probe_3Com(device_t, int, int);
#endif
#ifdef ED_SIC
int ed_probe_SIC(device_t, int, int);
#endif
int ed_probe_Novell_generic(device_t, int);
int ed_probe_Novell(device_t, int, int);
void ed_Novell_read_mac(struct ed_softc *);
#ifdef ED_HPP
int ed_probe_HP_pclanp(device_t, int, int);
#endif
int ed_attach(device_t);
int ed_detach(device_t);
int ed_clear_memory(device_t);
int ed_isa_mem_ok(device_t, u_long, u_int); /* XXX isa specific */
void ed_stop(struct ed_softc *);
void ed_shmem_readmem16(struct ed_softc *, bus_size_t, uint8_t *, uint16_t);
void ed_shmem_readmem8(struct ed_softc *, bus_size_t, uint8_t *, uint16_t);
u_short ed_shmem_write_mbufs(struct ed_softc *, struct mbuf *, bus_size_t);
void ed_pio_readmem(struct ed_softc *, bus_size_t, uint8_t *, uint16_t);
void ed_pio_writemem(struct ed_softc *, uint8_t *, uint16_t, uint16_t);
u_short ed_pio_write_mbufs(struct ed_softc *, struct mbuf *, bus_size_t);
void ed_disable_16bit_access(struct ed_softc *);
void ed_enable_16bit_access(struct ed_softc *);
void ed_gen_ifmedia_init(struct ed_softc *);
driver_intr_t edintr;
extern devclass_t ed_devclass;
/*
* Vendor types
*/
#define ED_VENDOR_WD_SMC 0x00 /* Western Digital/SMC */
#define ED_VENDOR_3COM 0x01 /* 3Com */
#define ED_VENDOR_NOVELL 0x02 /* Novell */
#define ED_VENDOR_HP 0x03 /* Hewlett Packard */
#define ED_VENDOR_SIC 0x04 /* Allied-Telesis SIC */
/*
* Configure time flags
*/
/*
* this sets the default for enabling/disabling the transceiver
*/
#define ED_FLAGS_DISABLE_TRANCEIVER 0x0001
/*
* This forces the board to be used in 8/16bit mode even if it
* autoconfigs differently
*/
#define ED_FLAGS_FORCE_8BIT_MODE 0x0002
#define ED_FLAGS_FORCE_16BIT_MODE 0x0004
/*
* This disables the use of double transmit buffers.
*/
#define ED_FLAGS_NO_MULTI_BUFFERING 0x0008
/*
* This forces all operations with the NIC memory to use Programmed
* I/O (i.e. not via shared memory)
*/
#define ED_FLAGS_FORCE_PIO 0x0010
/*
* This forces a PC Card, and disables ISA memory range checks
*/
#define ED_FLAGS_PCCARD 0x0020
/*
* These are flags describing the chip type.
*/
#define ED_FLAGS_TOSH_ETHER 0x10000
#define ED_FLAGS_GWETHER 0x20000
#define ED_FLAGS_GETTYPE(flg) ((flg) & 0xff0000)
#define ED_MUTEX(_sc) (&(_sc)->sc_mtx)
#define ED_LOCK(_sc) mtx_lock(ED_MUTEX(_sc))
#define ED_UNLOCK(_sc) mtx_unlock(ED_MUTEX(_sc))
#define ED_LOCK_INIT(_sc) \
mtx_init(ED_MUTEX(_sc), device_get_nameunit(_sc->dev), \
MTX_NETWORK_LOCK, MTX_DEF)
#define ED_LOCK_DESTROY(_sc) mtx_destroy(ED_MUTEX(_sc));
#define ED_ASSERT_LOCKED(_sc) mtx_assert(ED_MUTEX(_sc), MA_OWNED);
#define ED_ASSERT_UNLOCKED(_sc) mtx_assert(ED_MUTEX(_sc), MA_NOTOWNED);
#endif /* SYS_DEV_ED_IF_EDVAR_H */

View file

@ -1,60 +0,0 @@
/*-
* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
*
* Copyright (c) 2003, David Madole
* All rights reserved.
* Copyright (c) 2005, M. Warner Losh.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice unmodified, this list of conditions, and the following
* disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* Based on patches subitted by: David Madole, edited by M. Warner Losh.
*
* $FreeBSD$
*/
/*
* RTL8019/8029 Specific Registers
*/
#define ED_RTL80X9_CONFIG0 0x03
#define ED_RTL80X9_CONFIG2 0x05
#define ED_RTL80X9_CONFIG3 0x06
#define ED_RTL80X9_80X9ID0 0x0a
#define ED_RTL80X9_ID0 0x50
#define ED_RTL80X9_80X9ID1 0x0b
#define ED_RTL8019_ID1 0x70
#define ED_RTL8029_ID1 0x43
#define ED_RTL80X9_CF0_BNC 0x04
#define ED_RTL80X9_CF0_AUI 0x20
#define ED_RTL80X9_CF2_MEDIA 0xc0
#define ED_RTL80X9_CF2_AUTO 0x00
#define ED_RTL80X9_CF2_10_T 0x40
#define ED_RTL80X9_CF2_10_5 0x80
#define ED_RTL80X9_CF2_10_2 0xc0
#define ED_RTL80X9_CF3_FUDUP 0x40
#define ED_RTL8029_PCI_ID 0x802910ec

View file

@ -1,40 +0,0 @@
/*-
* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
*
* Copyright (c) 2005, M. Warner Losh.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice unmodified, this list of conditions, and the following
* disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
/* Tamarack TC5299J */
#define ED_TC5299J_CRA 0x0a /* Config Register A */
#define ED_TC5299J_CRB 0x0b /* Config Register B */
#define ED_TC5299J_MIIBUS 0x03 /* MII bus register on in bank 3 */
#define ED_TC5299J_MII_CLK 0x01
#define ED_TC5299J_MII_DATAOUT 0x02
#define ED_TC5299J_MII_DIRIN 0x04
#define ED_TC5299J_MII_DATAIN 0x08

View file

@ -271,8 +271,6 @@ device wb # Winbond W89C840F
device xl # 3Com 3c90x (``Boomerang'', ``Cyclone'')
# ISA Ethernet NICs. pccard NICs included.
# 'device ed' requires 'device miibus'
device ed # NE[12]000, SMC Ultra, 3c503, DS8390 cards
device ex # Intel EtherExpress Pro/10 and Pro/10+
device ep # Etherlink III based cards
device fe # Fujitsu MB8696x based cards

View file

@ -505,9 +505,6 @@ device cpufreq
# ctau: Cronyx Tau sync dual port V.35/RS-232/RS-530/RS-449/X.21/G.703/E1
# serial adaptor (requires sppp (default), or NETGRAPH if
# NETGRAPH_CRONYX is configured)
# ed: Western Digital and SMC 80xx; Novell NE1000 and NE2000; 3Com 3C503
# HP PC Lan+, various PC Card devices
# (requires miibus)
# ipw: Intel PRO/Wireless 2100 IEEE 802.11 adapter
# iwi: Intel PRO/Wireless 2200BG/2225BG/2915ABG IEEE 802.11 adapters
# Requires the iwi firmware module
@ -536,7 +533,6 @@ hint.ctau.0.port="0x240"
hint.ctau.0.irq="15"
hint.ctau.0.drq="7"
#options NETGRAPH_CRONYX # Enable NETGRAPH support for Cronyx adapter(s)
device ed # NE[12]000, SMC Ultra, 3c503, DS8390 cards
options ED_3C503
options ED_HPP
options ED_SIC

View file

@ -107,7 +107,6 @@ SUBDIR= \
dcons_crom \
${_dpms} \
dummynet \
${_ed} \
${_efirt} \
${_em} \
${_ena} \
@ -599,7 +598,6 @@ _cbb= cbb
_cpuctl= cpuctl
_cpufreq= cpufreq
_dpms= dpms
_ed= ed
_em= em
_ep= ep
_et= et

View file

@ -1,17 +0,0 @@
# $FreeBSD$
.PATH: ${SRCTOP}/sys/dev/ed
KMOD= if_ed
SRCS= if_ed.c
SRCS+= if_ed_novell.c if_ed_wd80x3.c if_ed_rtl80x9.c isa_if.h
SRCS+= if_ed_isa.c
SRCS.ED_HPP=if_ed_hpp.c
SRCS.ED_SIC=if_ed_sic.c
SRCS.ED_3C503=if_ed_3c503.c
SRCS+= if_ed_pccard.c pccarddevs.h card_if.h
SRCS.DEV_PCI=if_ed_pci.c pci_if.h
SRCS+= opt_ed.h bus_if.h device_if.h miibus_if.h
.include <bsd.kmod.mk>