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bhyve: Improve pcifd function naming

Browse source 
read_config() and write_config() are externally visible, so give them
more descriptive names.  No functional change intended.

MFC after:	1 week
Sponsored by:	Innovate UK
This commit is contained in:
Mark Johnston 2023-10-04 12:19:58 -04:00
parent dfa9e89fcd
commit 01d53c34e7
5 changed files with 37 additions and 28 deletions
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2
usr.sbin/bhyve/pci_emul.c
View file

@ -375,7 +375,7 @@ pci_config_read_reg(const struct pcisel *const host_sel, nvlist_t *nvl,
if (config == NULL) {
return def;
} else if (host_sel != NULL && strcmp(config, "host") == 0) {
return read_config(host_sel, reg, size);
return pci_host_read_config(host_sel, reg, size);
} else {
return strtol(config, NULL, 16);
}

8
usr.sbin/bhyve/pci_gvt-d.c
View file

@ -49,11 +49,11 @@ gvt_d_probe(struct pci_devinst *const pi)
sc = pi->pi_arg;
vendor = read_config(passthru_get_sel(sc), PCIR_VENDOR, 0x02);
vendor = pci_host_read_config(passthru_get_sel(sc), PCIR_VENDOR, 0x02);
if (vendor != PCI_VENDOR_INTEL)
return (ENXIO);
class = read_config(passthru_get_sel(sc), PCIR_CLASS, 0x01);
class = pci_host_read_config(passthru_get_sel(sc), PCIR_CLASS, 0x01);
if (class != PCIC_DISPLAY)
return (ENXIO);
@ -169,7 +169,7 @@ gvt_d_setup_gsm(struct pci_devinst *const pi)
"Warning: Unable to reuse host address of Graphics Stolen Memory. GPU passthrough might not work properly.");
}
bdsm = read_config(passthru_get_sel(sc), PCIR_BDSM, 4);
bdsm = pci_host_read_config(passthru_get_sel(sc), PCIR_BDSM, 4);
pci_set_cfgdata32(pi, PCIR_BDSM,
gsm->gpa | (bdsm & (PCIM_BDSM_GSM_ALIGNMENT - 1)));
@ -201,7 +201,7 @@ gvt_d_setup_opregion(struct pci_devinst *const pi)
return (-1);
}
asls = read_config(passthru_get_sel(sc), PCIR_ASLS_CTL, 4);
asls = pci_host_read_config(passthru_get_sel(sc), PCIR_ASLS_CTL, 4);
header = mmap(NULL, sizeof(*header), PROT_READ, MAP_SHARED, memfd,
asls);

9
usr.sbin/bhyve/pci_lpc.c
View file

@ -485,15 +485,16 @@ pci_lpc_get_sel(struct pcisel *const sel)
sel->pc_dev = slot;
sel->pc_func = 0;
if (read_config(sel, PCIR_HDRTYPE, 1) & PCIM_MFDEV)
if (pci_host_read_config(sel, PCIR_HDRTYPE, 1) & PCIM_MFDEV)
max_func = PCI_FUNCMAX;
for (uint8_t func = 0; func <= max_func; ++func) {
sel->pc_func = func;
if ((read_config(sel, PCIR_CLASS, 1) == PCIC_BRIDGE) &&
(read_config(sel, PCIR_SUBCLASS, 1) ==
PCIS_BRIDGE_ISA)) {
if (pci_host_read_config(sel, PCIR_CLASS, 1) ==
PCIC_BRIDGE &&
pci_host_read_config(sel, PCIR_SUBCLASS, 1) ==
PCIS_BRIDGE_ISA) {
return (0);
}
}

40
usr.sbin/bhyve/pci_passthru.c
View file

@ -145,7 +145,7 @@ pcifd_init(void)
}
uint32_t
read_config(const struct pcisel *sel, long reg, int width)
pci_host_read_config(const struct pcisel *sel, long reg, int width)
{
struct pci_io pi;
@ -165,7 +165,8 @@ read_config(const struct pcisel *sel, long reg, int width)
}
void
write_config(const struct pcisel *sel, long reg, int width, uint32_t data)
pci_host_write_config(const struct pcisel *sel, long reg, int width,
uint32_t data)
{
struct pci_io pi;
@ -224,24 +225,25 @@ cfginitmsi(struct passthru_softc *sc)
* Parse the capabilities and cache the location of the MSI
* and MSI-X capabilities.
*/
sts = read_config(&sel, PCIR_STATUS, 2);
sts = pci_host_read_config(&sel, PCIR_STATUS, 2);
if (sts & PCIM_STATUS_CAPPRESENT) {
ptr = read_config(&sel, PCIR_CAP_PTR, 1);
ptr = pci_host_read_config(&sel, PCIR_CAP_PTR, 1);
while (ptr != 0 && ptr != 0xff) {
cap = read_config(&sel, ptr + PCICAP_ID, 1);
cap = pci_host_read_config(&sel, ptr + PCICAP_ID, 1);
if (cap == PCIY_MSI) {
/*
* Copy the MSI capability into the config
* space of the emulated pci device
*/
sc->psc_msi.capoff = ptr;
sc->psc_msi.msgctrl = read_config(&sel,
ptr + 2, 2);
sc->psc_msi.msgctrl = pci_host_read_config(&sel,
ptr + 2, 2);
sc->psc_msi.emulated = 0;
caplen = msi_caplen(sc->psc_msi.msgctrl);
capptr = ptr;
while (caplen > 0) {
u32 = read_config(&sel, capptr, 4);
u32 = pci_host_read_config(&sel, capptr,
4);
pci_set_cfgdata32(pi, capptr, u32);
caplen -= 4;
capptr += 4;
@ -255,7 +257,8 @@ cfginitmsi(struct passthru_softc *sc)
msixcap_ptr = (char *)&msixcap;
capptr = ptr;
while (caplen > 0) {
u32 = read_config(&sel, capptr, 4);
u32 = pci_host_read_config(&sel, capptr,
4);
memcpy(msixcap_ptr, &u32, 4);
pci_set_cfgdata32(pi, capptr, u32);
caplen -= 4;
@ -263,7 +266,8 @@ cfginitmsi(struct passthru_softc *sc)
msixcap_ptr += 4;
}
}
ptr = read_config(&sel, ptr + PCICAP_NEXTPTR, 1);
ptr = pci_host_read_config(&sel, ptr + PCICAP_NEXTPTR,
1);
}
}
@ -298,7 +302,7 @@ cfginitmsi(struct passthru_softc *sc)
*/
if ((sts & PCIM_STATUS_CAPPRESENT) != 0 && sc->psc_msi.capoff == 0) {
int origptr, msiptr;
origptr = read_config(&sel, PCIR_CAP_PTR, 1);
origptr = pci_host_read_config(&sel, PCIR_CAP_PTR, 1);
msiptr = passthru_add_msicap(pi, 1, origptr);
sc->psc_msi.capoff = msiptr;
sc->psc_msi.msgctrl = pci_get_cfgdata16(pi, msiptr + 2);
@ -577,7 +581,8 @@ cfginitbar(struct passthru_softc *sc)
return (-1);
/* Use same lobits as physical bar */
uint8_t lobits = read_config(&sc->psc_sel, PCIR_BAR(i), 0x01);
uint8_t lobits = pci_host_read_config(&sc->psc_sel, PCIR_BAR(i),
0x01);
if (bartype == PCIBAR_MEM32 || bartype == PCIBAR_MEM64) {
lobits &= ~PCIM_BAR_MEM_BASE;
} else {
@ -621,7 +626,8 @@ cfginit(struct pci_devinst *pi, int bus, int slot, int func)
intline = pci_get_cfgdata8(pi, PCIR_INTLINE);
intpin = pci_get_cfgdata8(pi, PCIR_INTPIN);
for (int i = 0; i <= PCIR_MAXLAT; i += 4) {
pci_set_cfgdata32(pi, i, read_config(&sc->psc_sel, i, 4));
pci_set_cfgdata32(pi, i,
pci_host_read_config(&sc->psc_sel, i, 4));
}
pci_set_cfgdata8(pi, PCIR_INTLINE, intline);
pci_set_cfgdata8(pi, PCIR_INTPIN, intpin);
@ -638,7 +644,7 @@ cfginit(struct pci_devinst *pi, int bus, int slot, int func)
goto done;
}
write_config(&sc->psc_sel, PCIR_COMMAND, 2,
pci_host_write_config(&sc->psc_sel, PCIR_COMMAND, 2,
pci_get_cfgdata16(pi, PCIR_COMMAND));
/*
@ -988,13 +994,13 @@ passthru_cfgread_default(struct passthru_softc *sc,
if (coff == PCIR_COMMAND) {
if (bytes <= 2)
return (-1);
*rv = read_config(&sc->psc_sel, PCIR_STATUS, 2) << 16 |
*rv = pci_host_read_config(&sc->psc_sel, PCIR_STATUS, 2) << 16 |
pci_get_cfgdata16(pi, PCIR_COMMAND);
return (0);
}
/* Everything else just read from the device's config space */
*rv = read_config(&sc->psc_sel, coff, bytes);
*rv = pci_host_read_config(&sc->psc_sel, coff, bytes);
return (0);
}
@ -1080,7 +1086,7 @@ passthru_cfgwrite_default(struct passthru_softc *sc, struct pci_devinst *pi,
}
#endif
write_config(&sc->psc_sel, coff, bytes, val);
pci_host_write_config(&sc->psc_sel, coff, bytes, val);
if (coff == PCIR_COMMAND) {
cmd_old = pci_get_cfgdata16(pi, PCIR_COMMAND);
if (bytes == 1)

6
usr.sbin/bhyve/pci_passthru.h
View file

@ -36,8 +36,10 @@ typedef int (*cfgread_handler)(struct passthru_softc *sc,
typedef int (*cfgwrite_handler)(struct passthru_softc *sc,
struct pci_devinst *pi, int coff, int bytes, uint32_t val);
uint32_t read_config(const struct pcisel *sel, long reg, int width);
void write_config(const struct pcisel *sel, long reg, int width, uint32_t data);
uint32_t pci_host_read_config(const struct pcisel *sel, long reg, int width);
void pci_host_write_config(const struct pcisel *sel, long reg, int width,
uint32_t data);
int passthru_cfgread_emulate(struct passthru_softc *sc, struct pci_devinst *pi,
int coff, int bytes, uint32_t *rv);
int passthru_cfgwrite_emulate(struct passthru_softc *sc, struct pci_devinst *pi,