Rename busdma_sync() to busdma_sync_range() and rename the

base and size parameters to ofs and len (resp). Add a new
busdma_sync() that makes the entire MD coherent.
This commit is contained in:
Marcel Moolenaar 2015-08-02 01:09:30 +00:00
parent 16f3fdf55f
commit 015b858345
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=286176
5 changed files with 36 additions and 11 deletions

View file

@ -227,8 +227,15 @@ busdma_seg_get_size(busdma_seg_t seg)
}
int
busdma_sync(busdma_md_t md, int op, bus_addr_t base, bus_size_t size)
busdma_sync(busdma_md_t md, int op)
{
return (bd_sync(md, op, base, size));
return (bd_sync(md, op, 0UL, ~0UL));
}
int
busdma_sync_range(busdma_md_t md, int op, bus_size_t ofs, bus_size_t len)
{
return (bd_sync(md, op, ofs, len));
}

View file

@ -78,6 +78,7 @@ bus_size_t busdma_seg_get_size(busdma_seg_t seg);
#define BUSDMA_SYNC_PREWRITE 4
#define BUSDMA_SYNC_POSTWRITE 8
int busdma_sync(busdma_md_t md, int op, bus_addr_t, bus_size_t);
int busdma_sync(busdma_md_t md, int op);
int busdma_sync_range(busdma_md_t md, int op, bus_size_t, bus_size_t);
#endif /* _LIBBUS_SPACE_H_ */

View file

@ -384,12 +384,27 @@ busdma_seg_get_size(PyObject *self, PyObject *args)
static PyObject *
busdma_sync(PyObject *self, PyObject *args)
{
u_long base, size;
int error, mdid, op;
if (!PyArg_ParseTuple(args, "iikk", &mdid, &op, &base, &size))
if (!PyArg_ParseTuple(args, "ii", &mdid, &op))
return (NULL);
error = bd_sync(mdid, op, base, size);
error = bd_sync(mdid, op, 0UL, ~0UL);
if (error) {
PyErr_SetString(PyExc_IOError, strerror(error));
return (NULL);
}
Py_RETURN_NONE;
}
static PyObject *
busdma_sync_range(PyObject *self, PyObject *args)
{
u_long ofs, len;
int error, mdid, op;
if (!PyArg_ParseTuple(args, "iikk", &mdid, &op, &ofs, &len))
return (NULL);
error = bd_sync(mdid, op, ofs, len);
if (error) {
PyErr_SetString(PyExc_IOError, strerror(error));
return (NULL);
@ -448,7 +463,9 @@ static PyMethodDef busdma_methods[] = {
"Return the size of the segment." },
{ "sync", busdma_sync, METH_VARARGS,
"Keep memory/caches coherent WRT to DMA." },
"Make the entire memory descriptor coherent WRT to DMA." },
{ "sync_range", busdma_sync_range, METH_VARARGS,
"Make part of the memory descriptor coherent WRT to DMA." },
{ NULL, NULL, 0, NULL }
};

View file

@ -536,7 +536,7 @@ bd_seg_get_size(int sid, u_long *size_p)
}
int
bd_sync(int mdid, u_int op, u_long base, u_long size)
bd_sync(int mdid, u_int op, u_long ofs, u_long len)
{
struct proto_ioc_busdma ioc;
struct obj *md;
@ -549,8 +549,8 @@ bd_sync(int mdid, u_int op, u_long base, u_long size)
ioc.request = PROTO_IOC_BUSDMA_SYNC;
ioc.key = md->key;
ioc.u.sync.op = op;
ioc.u.sync.base = base;
ioc.u.sync.size = size;
ioc.u.sync.base = ofs;
ioc.u.sync.size = len;
if (ioctl(md->fd, PROTO_IOC_BUSDMA, &ioc) == -1)
return (errno);

View file

@ -51,6 +51,6 @@ int bd_md_next_seg(int mdid, int sid);
int bd_seg_get_addr(int sid, u_long *);
int bd_seg_get_size(int sid, u_long *);
int bd_sync(int mdid, u_int op, u_long base, u_long size);
int bd_sync(int mdid, u_int op, u_long ofs, u_long len);
#endif /* _TOOLS_BUS_DMA_H_ */