mirror of
https://github.com/freebsd/freebsd-src
synced 2024-07-22 02:37:15 +00:00
bhyve: Implement a PL031 RTC on arm64
Unlike amd64's, this RTC is implemented entirely in userspace. This is the same RTC as is provided by QEMU's virt machine. Reviewed by: jhb MFC after: 2 weeks Obtained from: CheriBSD
This commit is contained in:
Jessica Clarke
Mark Johnston
parent
e3bd5730ca
commit
014d7082a2
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@ -1,5 +1,6 @@
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SRCS+= \
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fdt.c \
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rtc_pl031.c \
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uart_pl011.c
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.PATH: ${BHYVE_SYSDIR}/sys/arm64/vmm
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@ -48,6 +48,7 @@
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#include "mem.h"
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#include "pci_emul.h"
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#include "pci_irq.h"
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#include "rtc_pl031.h"
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#include "uart_emul.h"
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/* Start of mem + 1M */
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@ -58,6 +59,9 @@
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#define UART_MMIO_BASE 0x10000
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#define UART_MMIO_SIZE 0x1000
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#define UART_INTR 32
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#define RTC_MMIO_BASE 0x11000
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#define RTC_MMIO_SIZE 0x1000
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#define RTC_INTR 33
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#define GIC_DIST_BASE 0x2f000000
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#define GIC_DIST_SIZE 0x10000
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@ -287,6 +291,60 @@ init_mmio_uart(struct vmctx *ctx)
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return (true);
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}
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static void
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mmio_rtc_intr_assert(void *arg)
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{
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struct vmctx *ctx = arg;
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vm_assert_irq(ctx, RTC_INTR);
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}
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static void
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mmio_rtc_intr_deassert(void *arg)
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{
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struct vmctx *ctx = arg;
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vm_deassert_irq(ctx, RTC_INTR);
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}
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static int
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mmio_rtc_mem_handler(struct vcpu *vcpu __unused, int dir,
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uint64_t addr, int size __unused, uint64_t *val, void *arg1, long arg2)
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{
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struct rtc_pl031_softc *sc = arg1;
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long reg;
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reg = addr - arg2;
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if (dir == MEM_F_WRITE)
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rtc_pl031_write(sc, reg, *val);
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else
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*val = rtc_pl031_read(sc, reg);
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return (0);
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}
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static void
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init_mmio_rtc(struct vmctx *ctx)
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{
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struct rtc_pl031_softc *sc;
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struct mem_range mr;
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int error;
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sc = rtc_pl031_init(mmio_rtc_intr_assert, mmio_rtc_intr_deassert,
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ctx);
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bzero(&mr, sizeof(struct mem_range));
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mr.name = "rtc";
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mr.base = RTC_MMIO_BASE;
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mr.size = RTC_MMIO_SIZE;
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mr.flags = MEM_F_RW;
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mr.handler = mmio_rtc_mem_handler;
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mr.arg1 = sc;
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mr.arg2 = mr.base;
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error = register_mem(&mr);
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assert(error == 0);
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}
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static vm_paddr_t
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fdt_gpa(struct vmctx *ctx)
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{
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@ -328,6 +386,8 @@ bhyve_init_platform(struct vmctx *ctx, struct vcpu *bsp)
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if (init_mmio_uart(ctx))
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fdt_add_uart(UART_MMIO_BASE, UART_MMIO_SIZE, UART_INTR);
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init_mmio_rtc(ctx);
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fdt_add_rtc(RTC_MMIO_BASE, RTC_MMIO_SIZE, RTC_INTR);
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fdt_add_timer();
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pci_irq_init(pcie_intrs);
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fdt_add_pcie(pcie_intrs);
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@ -248,6 +248,37 @@ fdt_add_uart(uint64_t uart_base, uint64_t uart_size, int intr)
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fdt_end_node(fdt);
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}
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void
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fdt_add_rtc(uint64_t rtc_base, uint64_t rtc_size, int intr)
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{
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void *fdt, *interrupts, *prop;
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char node_name[32];
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assert(gic_phandle != 0);
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assert(apb_pclk_phandle != 0);
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assert(intr >= GIC_FIRST_SPI);
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fdt = fdtroot;
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snprintf(node_name, sizeof(node_name), "rtc@%lx", rtc_base);
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fdt_begin_node(fdt, node_name);
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#define RTC_COMPAT "arm,pl031\0arm,primecell"
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fdt_property(fdt, "compatible", RTC_COMPAT, sizeof(RTC_COMPAT));
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#undef RTC_COMPAT
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set_single_reg(fdt, rtc_base, rtc_size);
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fdt_property_u32(fdt, "interrupt-parent", gic_phandle);
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fdt_property_placeholder(fdt, "interrupts", 3 * sizeof(uint32_t),
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&interrupts);
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SET_PROP_U32(interrupts, 0, GIC_SPI);
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SET_PROP_U32(interrupts, 1, intr - GIC_FIRST_SPI);
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SET_PROP_U32(interrupts, 2, IRQ_TYPE_LEVEL_HIGH);
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fdt_property_placeholder(fdt, "clocks", sizeof(uint32_t), &prop);
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SET_PROP_U32(prop, 0, apb_pclk_phandle);
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fdt_property_string(fdt, "clock-names", "apb_pclk");
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fdt_end_node(fdt);
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}
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void
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fdt_add_timer(void)
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{
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@ -42,6 +42,7 @@ void fdt_add_gic(uint64_t dist_base, uint64_t dist_size,
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void fdt_add_timer(void);
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void fdt_add_pcie(int intrs[static 4]);
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void fdt_add_uart(uint64_t uart_base, uint64_t uart_size, int intr);
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void fdt_add_rtc(uint64_t rtc_base, uint64_t rtc_size, int intr);
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void fdt_finalize(void);
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#endif /* _FDT_H_ */
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279
usr.sbin/bhyve/rtc_pl031.c
Normal file
279
usr.sbin/bhyve/rtc_pl031.c
Normal file
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@ -0,0 +1,279 @@
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/*-
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2024 Jessica Clarke <jrtc27@FreeBSD.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/param.h>
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#include <assert.h>
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#include <limits.h>
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#include <pthread.h>
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#include <stdlib.h>
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#include <time.h>
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#include "config.h"
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#include "mevent.h"
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#include "rtc_pl031.h"
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#define RTCDR 0x000
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#define RTCMR 0x004
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#define RTCLR 0x008
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#define RTCCR 0x00C
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#define RTCIMSC 0x010
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#define RTCRIS 0x014
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#define RTCMIS 0x018
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#define RTCICR 0x01C
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#define RTCPeriphID0 0xFE0
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#define RTCPeriphID1 0xFE4
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#define RTCPeriphID2 0xFE8
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#define RTCPeriphID3 0xFEC
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#define _RTCPeriphID_VAL 0x00141031
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#define RTCPeriphID_VAL(_n) ((_RTCPeriphID_VAL >> (8 * (_n))) & 0xff)
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#define RTCCellID0 0xFF0
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#define RTCCellID1 0xFF4
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#define RTCCellID2 0xFF8
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#define RTCCellID3 0xFFC
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#define _RTCCellID_VAL 0xb105f00d
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#define RTCCellID_VAL(_n) ((_RTCCellID_VAL >> (8 * (_n))) & 0xff)
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struct rtc_pl031_softc {
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pthread_mutex_t mtx;
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time_t last_tick;
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uint32_t dr;
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uint32_t mr;
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uint32_t lr;
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uint8_t imsc;
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uint8_t ris;
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uint8_t prev_mis;
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struct mevent *mevp;
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void *arg;
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rtc_pl031_intr_func_t intr_assert;
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rtc_pl031_intr_func_t intr_deassert;
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};
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static void rtc_pl031_callback(int fd, enum ev_type type, void *param);
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/*
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* Returns the current RTC time as number of seconds since 00:00:00 Jan 1, 1970
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*/
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static time_t
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rtc_pl031_time(void)
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{
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struct tm tm;
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time_t t;
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time(&t);
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if (get_config_bool_default("rtc.use_localtime", false)) {
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localtime_r(&t, &tm);
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t = timegm(&tm);
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}
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return (t);
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}
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static void
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rtc_pl031_update_mis(struct rtc_pl031_softc *sc)
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{
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uint8_t mis;
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mis = sc->ris & sc->imsc;
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if (mis == sc->prev_mis)
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return;
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sc->prev_mis = mis;
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if (mis)
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(*sc->intr_assert)(sc->arg);
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else
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(*sc->intr_deassert)(sc->arg);
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}
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static uint64_t
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rtc_pl031_next_match_ticks(struct rtc_pl031_softc *sc)
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{
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uint32_t ticks;
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ticks = sc->mr - sc->dr;
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if (ticks == 0)
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return ((uint64_t)1 << 32);
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return (ticks);
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}
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static int
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rtc_pl031_next_timer_msecs(struct rtc_pl031_softc *sc)
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{
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uint64_t ticks;
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ticks = rtc_pl031_next_match_ticks(sc);
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return (MIN(ticks * 1000, INT_MAX));
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}
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static void
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rtc_pl031_update_timer(struct rtc_pl031_softc *sc)
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{
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mevent_timer_update(sc->mevp, rtc_pl031_next_timer_msecs(sc));
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}
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static void
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rtc_pl031_tick(struct rtc_pl031_softc *sc, bool from_timer)
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{
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bool match;
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time_t now, ticks;
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now = rtc_pl031_time();
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ticks = now - sc->last_tick;
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match = ticks >= 0 &&
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(uint64_t)ticks >= rtc_pl031_next_match_ticks(sc);
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sc->dr += ticks;
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sc->last_tick = now;
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if (match) {
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sc->ris = 1;
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rtc_pl031_update_mis(sc);
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}
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if (match || from_timer || ticks < 0)
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rtc_pl031_update_timer(sc);
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}
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static void
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rtc_pl031_callback(int fd __unused, enum ev_type type __unused, void *param)
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{
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struct rtc_pl031_softc *sc = param;
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pthread_mutex_lock(&sc->mtx);
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rtc_pl031_tick(sc, true);
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pthread_mutex_unlock(&sc->mtx);
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}
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void
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rtc_pl031_write(struct rtc_pl031_softc *sc, int offset, uint32_t value)
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{
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pthread_mutex_lock(&sc->mtx);
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rtc_pl031_tick(sc, false);
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switch (offset) {
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case RTCMR:
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sc->mr = value;
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rtc_pl031_update_timer(sc);
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break;
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case RTCLR:
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sc->lr = value;
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sc->dr = sc->lr;
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rtc_pl031_update_timer(sc);
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break;
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case RTCIMSC:
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sc->imsc = value & 1;
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rtc_pl031_update_mis(sc);
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break;
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case RTCICR:
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sc->ris &= ~value;
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rtc_pl031_update_mis(sc);
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break;
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default:
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/* Ignore writes to read-only/unassigned/ID registers */
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break;
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}
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pthread_mutex_unlock(&sc->mtx);
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}
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uint32_t
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rtc_pl031_read(struct rtc_pl031_softc *sc, int offset)
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{
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uint32_t reg;
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pthread_mutex_lock(&sc->mtx);
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rtc_pl031_tick(sc, false);
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switch (offset) {
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case RTCDR:
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reg = sc->dr;
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break;
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case RTCMR:
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reg = sc->mr;
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break;
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case RTCLR:
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reg = sc->lr;
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break;
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case RTCCR:
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/* RTC enabled from reset */
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reg = 1;
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break;
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case RTCIMSC:
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reg = sc->imsc;
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break;
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case RTCRIS:
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reg = sc->ris;
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break;
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case RTCMIS:
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reg = sc->ris & sc->imsc;
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break;
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case RTCPeriphID0:
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case RTCPeriphID1:
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case RTCPeriphID2:
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case RTCPeriphID3:
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reg = RTCPeriphID_VAL(offset - RTCPeriphID0);
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break;
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case RTCCellID0:
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case RTCCellID1:
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case RTCCellID2:
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case RTCCellID3:
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reg = RTCCellID_VAL(offset - RTCCellID0);
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break;
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default:
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/* Return 0 in reads from unasigned registers */
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reg = 0;
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break;
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}
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pthread_mutex_unlock(&sc->mtx);
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return (reg);
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}
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struct rtc_pl031_softc *
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rtc_pl031_init(rtc_pl031_intr_func_t intr_assert,
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rtc_pl031_intr_func_t intr_deassert, void *arg)
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{
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struct rtc_pl031_softc *sc;
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time_t now;
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sc = calloc(1, sizeof(struct rtc_pl031_softc));
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pthread_mutex_init(&sc->mtx, NULL);
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now = rtc_pl031_time();
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sc->dr = now;
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sc->last_tick = now;
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sc->arg = arg;
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sc->intr_assert = intr_assert;
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sc->intr_deassert = intr_deassert;
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sc->mevp = mevent_add(rtc_pl031_next_timer_msecs(sc), EVF_TIMER,
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rtc_pl031_callback, sc);
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return (sc);
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}
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40
usr.sbin/bhyve/rtc_pl031.h
Normal file
40
usr.sbin/bhyve/rtc_pl031.h
Normal file
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@ -0,0 +1,40 @@
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/*-
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* SPDX-License-Identifier: BSD-2-Clause
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*
|
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* Copyright (c) 2024 Jessica Clarke <jrtc27@FreeBSD.org>
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*
|
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* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
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* SUCH DAMAGE.
|
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*/
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#ifndef _RTC_PL031_H_
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#define _RTC_PL031_H_
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struct rtc_pl031_softc;
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typedef void (*rtc_pl031_intr_func_t)(void *arg);
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struct rtc_pl031_softc *rtc_pl031_init(rtc_pl031_intr_func_t intr_assert,
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rtc_pl031_intr_func_t intr_deassert, void *arg);
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void rtc_pl031_write(struct rtc_pl031_softc *sc, int offset,
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uint32_t value);
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uint32_t rtc_pl031_read(struct rtc_pl031_softc *sc, int offset);
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||||
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#endif /* _RTC_PL031_H_ */
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Reference in a new issue