- Add support for eMMC "partitions". Besides the user data area, i. e.
the default partition, eMMC v4.41 and later devices can additionally
provide up to:
1 enhanced user data area partition
2 boot partitions
1 RPMB (Replay Protected Memory Block) partition
4 general purpose partitions (optionally with a enhanced or extended
attribute)
Of these "partitions", only the enhanced user data area one actually
slices the user data area partition and, thus, gets handled with the
help of geom_flashmap(4). The other types of partitions have address
space independent from the default partition and need to be switched
to via CMD6 (SWITCH), i. e. constitute a set of additional "disks".
The second kind of these "partitions" doesn't fit that well into the
design of mmc(4) and mmcsd(4). I've decided to let mmcsd(4) hook all
of these "partitions" up as disk(9)'s (except for the RPMB partition
as it didn't seem to make much sense to be able to put a file-system
there and may require authentication; therefore, RPMB partitions are
solely accessible via the newly added IOCTL interface currently; see
also below). This approach for one resulted in cleaner code. Second,
it retains the notion of mmcsd(4) children corresponding to a single
physical device each. With the addition of some layering violations,
it also would have been possible for mmc(4) to add separate mmcsd(4)
instances with one disk each for all of these "partitions", however.
Still, both mmc(4) and mmcsd(4) share some common code now e. g. for
issuing CMD6, which has been factored out into mmc_subr.c.
Besides simply subdividing eMMC devices, some Intel NUCs having UEFI
code in the boot partitions etc., another use case for the partition
support is the activation of pseudo-SLC mode, which manufacturers of
eMMC chips typically associate with the enhanced user data area and/
or the enhanced attribute of general purpose partitions.
CAVEAT EMPTOR: Partitioning eMMC devices is a one-time operation.
- Now that properly issuing CMD6 is crucial (so data isn't written to
the wrong partition for example), make a step into the direction of
correctly handling the timeout for these commands in the MMC layer.
Also, do a SEND_STATUS when CMD6 is invoked with an R1B response as
recommended by relevant specifications. However, quite some work is
left to be done in this regard; all other R1B-type commands done by
the MMC layer also should be followed by a SEND_STATUS (CMD13), the
erase timeout calculations/handling as documented in specifications
are entirely ignored so far, the MMC layer doesn't provide timeouts
applicable up to the bridge drivers and at least sdhci(4) currently
is hardcoding 1 s as timeout for all command types unconditionally.
Let alone already available return codes often not being checked in
the MMC layer ...
- Add an IOCTL interface to mmcsd(4); this is sufficiently compatible
with Linux so that the GNU mmc-utils can be ported to and used with
FreeBSD (note that due to the remaining deficiencies outlined above
SANITIZE operations issued by/with `mmc` currently most likely will
fail). These latter will be added to ports as sysutils/mmc-utils in
a bit. Among others, the `mmc` tool of the GNU mmc-utils allows for
partitioning eMMC devices (tested working).
- For devices following the eMMC specification v4.41 or later, year 0
is 2013 rather than 1997; so correct this for assembling the device
ID string properly.
- Let mmcsd.ko depend on mmc.ko. Additionally, bump MMC_VERSION as at
least for some of the above a matching pair is required.
- In the ACPI front-end of sdhci(4) describe the Intel eMMC and SDXC
controllers as such in order to match the PCI one.
Additionally, in the entry for the 80860F14 SDXC controller remove
the eMMC-only SDHCI_QUIRK_INTEL_POWER_UP_RESET.
OKed by: imp
Submitted by: ian (mmc_switch_status() implementation)
2017-03-16 22:23:04 +00:00
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/*-
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* Copyright (c) 2017 Marius Strobl <marius@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef _DEV_MMC_MMC_IOCTL_H_
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#define _DEV_MMC_MMC_IOCTL_H_
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struct mmc_ioc_cmd {
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int write_flag; /* 0: RD, 1: WR, (1 << 31): reliable WR */
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int is_acmd; /* 0: normal, 1: use CMD55 */
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uint32_t opcode;
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uint32_t arg;
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uint32_t response[4];
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u_int flags;
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u_int blksz;
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u_int blocks;
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u_int __spare[4];
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uint32_t __pad;
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uint64_t data_ptr;
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};
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#define mmc_ioc_cmd_set_data(mic, ptr) \
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(mic).data_ptr = (uint64_t)(uintptr_t)(ptr)
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struct mmc_ioc_multi_cmd {
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uint64_t num_of_cmds;
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struct mmc_ioc_cmd cmds[0];
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};
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#define MMC_IOC_BASE 'M'
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#define MMC_IOC_CMD _IOWR(MMC_IOC_BASE, 0, struct mmc_ioc_cmd)
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o Add support for eMMC HS200 and HS400 bus speed modes at 200 MHz to
sdhci(4), mmc(4) and mmcsd(4). For the most part, this consists of:
- Correcting and extending the infrastructure for negotiating and
enabling post-DDR52 modes already added as part of r315598. In
fact, HS400ES now should work as well but hasn't been activated
due to lack of corresponding hardware.
- Adding support executing standard SDHCI initial tuning as well
as re-tuning as required for eMMC HS200/HS400 and the fast UHS-I
SD card modes. Currently, corresponding methods are only hooked
up to the ACPI and PCI front-ends of sdhci(4), though. Moreover,
sdhci(4) won't offer any modes requiring (re-)tuning to the MMC/SD
layer in order to not break operations with other sdhci(4) front-
ends. Likewise, sdhci(4) now no longer offers modes requiring the
set_uhs_timing method introduced in r315598 to be implemented/
hooked up (previously, this method was used with DDR52 only, which
in turn is only available with Intel controllers so far, i. e. no
such limitation was necessary before). Similarly for 1.2/1.8 V VCCQ
support and the switch_vccq method.
- Addition of locking to the IOCTL half of mmcsd(4) to prevent races
with detachment and suspension, especially since it's required to
immediately switch away from RPMB partitions again after an access
to these (so re-tuning can take place anew, given that the current
eMMC specification v5.1 doesn't allow tuning commands to be issued
with a RPMB partition selected). Therefore, the existing part_mtx
lock in the mmcsd(4) softc is additionally renamed to disk_mtx in
order to denote that it only refers to the disk(9) half, likewise
for corresponding macros.
On the system where the addition of DDR52 support increased the read
throughput to ~80 MB/s (from ~45 MB/s at high speed), HS200 yields
~154 MB/s and HS400 ~187 MB/s, i. e. performance now has more than
quadrupled compared to pre-r315598.
Also, with the advent of (re-)tuning support, most infrastructure
necessary for SD card UHS-I modes up to SDR104 now is also in place.
Note, though, that the standard SDHCI way of (re-)tuning is special
in several ways, which also is why sending the actual tuning requests
to the device is part of sdhci(4). SDHCI implementations not following
the specification, MMC and non-SDHCI SD card controllers likely will
use a generic implementation in the MMC/SD layer for executing tuning,
which hasn't been written so far, though.
However, in fact this isn't a feature-only change; there are boards
based on Intel Bay Trail where DDR52 is problematic and the suggested
workaround is to use HS200 mode instead. So far exact details are
unknown, however, i. e. whether that's due to a defect in these SoCs
or on the boards.
Moreover, due to the above changes requiring to be aware of possible
MMC siblings in the fast path of mmc(4), corresponding information
now is cached in mmc_softc. As a side-effect, mmc_calculate_clock(),
mmc_delete_cards(), mmc_discover_cards() and mmc_rescan_cards() now
all are guaranteed to operate on the same set of devices as there no
longer is any use of device_get_children(9), which can fail in low
memory situations. Likewise, mmc_calculate_clock() now longer will
trigger a panic due to the latter.
o Fix a bug in the failure reporting of mmcsd_delete(); in case of an
error when the starting block of a previously stored erase request
is used (in order to be able to erase a full erase sector worth of
data), the starting block of the newly supplied bio_pblkno has to be
returned for indicating no progress. Otherwise, upper layers might
be told that a negative number of BIOs have been completed, leading
to a panic.
o Fix 2 bugs on resume:
- Things done in fork1(9) like the acquisition of an SX lock or the
sleepable memory allocation are incompatible with a MTX_DEF taken.
Thus, mmcsd_resume() must not call kproc_create(9), which in turn
uses fork1(9), with the disk_mtx (formerly part_mtx) held.
- In mmc_suspend(), the bus is powered down, which in the typical
case of a device being selected at the time of suspension, causes
the device deselection as part of the bus acquisition by mmc(4) in
mmc_scan() to fail as the bus isn't powered up again before later
in mmc_go_discovery(). Thus, power down with the bus acquired in
mmc_suspend(), which will trigger the deselection up-front.
o Fix a memory leak in mmcsd_ioctl() in case copyin(9) fails. [1]
o Fix missing variable initialization in mmc_switch_status(). [2]
o Fix R1_SWITCH_ERROR detection in mmc_switch_status(). [3]
o Handle the case of device_add_child(9) failing, for example due to
a memory shortage, gracefully in mmc(4) and sdhci(4), including not
leaking memory for the instance variables in case of mmc(4) (which
might or might not fix [4] as the latter problem has been discovered
independently).
o Handle the case of an unknown SD CSD version in mmc_decode_csd_sd()
gracefully instead of calling panic(9).
o Again, check and handle the return values of some additional function
calls in mmc(4) instead of assuming that everything went right or mark
non-fatal errors by casting the return value to void.
o Correct a typo in the Linux IOCTL compatibility; it should have been
MMC_IOC_MULTI_CMD rather than MMC_IOC_CMD_MULTI.
o Now that we are reaching ever faster speeds (more improvement in this
regard is to be expected when adding ADMA support to sdhci(4)), apply
a few micro-optimizations like predicting mmc(4) and sdhci(4) debugging
to be off or caching erase sector and maximum data sizes as well support
of block addressing in mmsd(4) (instead of doing 2 indirections on every
read/write request for determining the maximum data size for example).
Reported by: Coverity
CID: 1372612 [1], 1372624 [2], 1372594 [3], 1007069 [4]
2017-07-23 16:11:47 +00:00
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#define MMC_IOC_MULTI_CMD _IOWR(MMC_IOC_BASE, 1, struct mmc_ioc_multi_cmd)
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- Add support for eMMC "partitions". Besides the user data area, i. e.
the default partition, eMMC v4.41 and later devices can additionally
provide up to:
1 enhanced user data area partition
2 boot partitions
1 RPMB (Replay Protected Memory Block) partition
4 general purpose partitions (optionally with a enhanced or extended
attribute)
Of these "partitions", only the enhanced user data area one actually
slices the user data area partition and, thus, gets handled with the
help of geom_flashmap(4). The other types of partitions have address
space independent from the default partition and need to be switched
to via CMD6 (SWITCH), i. e. constitute a set of additional "disks".
The second kind of these "partitions" doesn't fit that well into the
design of mmc(4) and mmcsd(4). I've decided to let mmcsd(4) hook all
of these "partitions" up as disk(9)'s (except for the RPMB partition
as it didn't seem to make much sense to be able to put a file-system
there and may require authentication; therefore, RPMB partitions are
solely accessible via the newly added IOCTL interface currently; see
also below). This approach for one resulted in cleaner code. Second,
it retains the notion of mmcsd(4) children corresponding to a single
physical device each. With the addition of some layering violations,
it also would have been possible for mmc(4) to add separate mmcsd(4)
instances with one disk each for all of these "partitions", however.
Still, both mmc(4) and mmcsd(4) share some common code now e. g. for
issuing CMD6, which has been factored out into mmc_subr.c.
Besides simply subdividing eMMC devices, some Intel NUCs having UEFI
code in the boot partitions etc., another use case for the partition
support is the activation of pseudo-SLC mode, which manufacturers of
eMMC chips typically associate with the enhanced user data area and/
or the enhanced attribute of general purpose partitions.
CAVEAT EMPTOR: Partitioning eMMC devices is a one-time operation.
- Now that properly issuing CMD6 is crucial (so data isn't written to
the wrong partition for example), make a step into the direction of
correctly handling the timeout for these commands in the MMC layer.
Also, do a SEND_STATUS when CMD6 is invoked with an R1B response as
recommended by relevant specifications. However, quite some work is
left to be done in this regard; all other R1B-type commands done by
the MMC layer also should be followed by a SEND_STATUS (CMD13), the
erase timeout calculations/handling as documented in specifications
are entirely ignored so far, the MMC layer doesn't provide timeouts
applicable up to the bridge drivers and at least sdhci(4) currently
is hardcoding 1 s as timeout for all command types unconditionally.
Let alone already available return codes often not being checked in
the MMC layer ...
- Add an IOCTL interface to mmcsd(4); this is sufficiently compatible
with Linux so that the GNU mmc-utils can be ported to and used with
FreeBSD (note that due to the remaining deficiencies outlined above
SANITIZE operations issued by/with `mmc` currently most likely will
fail). These latter will be added to ports as sysutils/mmc-utils in
a bit. Among others, the `mmc` tool of the GNU mmc-utils allows for
partitioning eMMC devices (tested working).
- For devices following the eMMC specification v4.41 or later, year 0
is 2013 rather than 1997; so correct this for assembling the device
ID string properly.
- Let mmcsd.ko depend on mmc.ko. Additionally, bump MMC_VERSION as at
least for some of the above a matching pair is required.
- In the ACPI front-end of sdhci(4) describe the Intel eMMC and SDXC
controllers as such in order to match the PCI one.
Additionally, in the entry for the 80860F14 SDXC controller remove
the eMMC-only SDHCI_QUIRK_INTEL_POWER_UP_RESET.
OKed by: imp
Submitted by: ian (mmc_switch_status() implementation)
2017-03-16 22:23:04 +00:00
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/* Maximum accepted data transfer size */
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#define MMC_IOC_MAX_BYTES (512 * 256)
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/* Maximum accepted number of commands */
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#define MMC_IOC_MAX_CMDS 255
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#endif /* _DEV_MMC_MMC_IOCTL_H_ */
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