rust/library
bors 335ffbfa54 Auto merge of #94472 - JmPotato:use_maybeuninit_for_vecdeque, r=m-ou-se
Use MaybeUninit in VecDeque to remove the undefined behavior of slice

Signed-off-by: JmPotato <ghzpotato@gmail.com>

Ref https://github.com/rust-lang/rust/issues/74189. Adjust the code to follow the [doc.rust-lang.org/reference/behavior-considered-undefined.html](https://doc.rust-lang.org/reference/behavior-considered-undefined.html).

* Change the return type of `buffer_as_slice` from `&[T]` to `&[MaybeUninit<T>]`.
* Add some corresponding safety comments.

Benchmark results:

master 8d6f527530

```rust
test collections::vec_deque::tests::bench_pop_back_100       ... bench:          47 ns/iter (+/- 1)
test collections::vec_deque::tests::bench_pop_front_100      ... bench:          50 ns/iter (+/- 4)
test collections::vec_deque::tests::bench_push_back_100      ... bench:          69 ns/iter (+/- 10)
test collections::vec_deque::tests::bench_push_front_100     ... bench:          72 ns/iter (+/- 6)
test collections::vec_deque::tests::bench_retain_half_10000  ... bench:     145,891 ns/iter (+/- 7,975)
test collections::vec_deque::tests::bench_retain_odd_10000   ... bench:     141,647 ns/iter (+/- 3,711)
test collections::vec_deque::tests::bench_retain_whole_10000 ... bench:     120,132 ns/iter (+/- 4,078)
```

This PR

```rust
test collections::vec_deque::tests::bench_pop_back_100       ... bench:          48 ns/iter (+/- 2)
test collections::vec_deque::tests::bench_pop_front_100      ... bench:          51 ns/iter (+/- 3)
test collections::vec_deque::tests::bench_push_back_100      ... bench:          73 ns/iter (+/- 2)
test collections::vec_deque::tests::bench_push_front_100     ... bench:          73 ns/iter (+/- 2)
test collections::vec_deque::tests::bench_retain_half_10000  ... bench:     131,796 ns/iter (+/- 5,440)
test collections::vec_deque::tests::bench_retain_odd_10000   ... bench:     137,563 ns/iter (+/- 3,349)
test collections::vec_deque::tests::bench_retain_whole_10000 ... bench:     128,815 ns/iter (+/- 3,289)
```
2022-03-11 19:23:55 +00:00
..
alloc Auto merge of #94472 - JmPotato:use_maybeuninit_for_vecdeque, r=m-ou-se 2022-03-11 19:23:55 +00:00
backtrace@b02ed04a7e Updated backtrace submodule 2021-11-02 12:31:34 +01:00
core Rollup merge of #94842 - tspiteri:there-is-no-try, r=Dylan-DPC 2022-03-11 13:38:39 +01:00
panic_abort Switch all libraries to the 2021 edition 2021-12-23 19:03:47 +08:00
panic_unwind library/panic_unwind: Define UNWIND_DATA_REG for m68k 2022-02-12 20:19:06 +00:00
portable-simd Use implicit capture syntax in format_args 2022-03-10 10:23:40 -05:00
proc_macro Use implicit capture syntax in format_args 2022-03-10 10:23:40 -05:00
profiler_builtins Switch all libraries to the 2021 edition 2021-12-23 19:03:47 +08:00
rtstartup
rustc-std-workspace-alloc Switch all libraries to the 2021 edition 2021-12-23 19:03:47 +08:00
rustc-std-workspace-core Switch all libraries to the 2021 edition 2021-12-23 19:03:47 +08:00
rustc-std-workspace-std Switch all libraries to the 2021 edition 2021-12-23 19:03:47 +08:00
std Rollup merge of #93283 - m1guelperez:master, r=Mark-Simulacrum 2022-03-11 13:38:36 +01:00
stdarch@bcbe010614 Update stdarch submodule 2022-03-02 20:06:46 +01:00
test Use implicit capture syntax in format_args 2022-03-10 10:23:40 -05:00
unwind Rollup merge of #93350 - gburgessiv:master, r=Mark-Simulacrum 2022-03-07 18:39:02 +01:00