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231896 commits

Author SHA1 Message Date
bors d4fbaa6fde Auto merge of #3022 - RalfJung:upcast, r=compiler-errors
replace AsAny hack by trait upcasting :)
2023-08-10 17:06:32 +00:00
Ralf Jung c20c381dca replace AsAny hack by trait upcasting :) 2023-08-10 19:04:46 +02:00
bors faee636ebf Auto merge of #114697 - matthiaskrgr:rollup-ywooy8x, r=matthiaskrgr
Rollup of 5 pull requests

Successful merges:

 - #114278 (better error handling for `rust.codegen-backends` on deserialization)
 - #114674 (Add clubby789 to `users_on_vacation`)
 - #114678 (`Expr::can_have_side_effects()` is incorrect for struct/enum/array/tuple literals)
 - #114681 (doc (unstable-book): fix a typo)
 - #114684 (Remove redundant calls to `resolve_vars_with_obligations`)

r? `@ghost`
`@rustbot` modify labels: rollup
2023-08-10 15:46:39 +00:00
León Orell Valerian Liehr 051eb7ca7c
Unlock trailing where-clauses for lazy type aliases 2023-08-10 16:13:08 +02:00
Matthias Krüger 5f0d5855cb
Rollup merge of #114684 - compiler-errors:redundant-resolves, r=lcnr
Remove redundant calls to `resolve_vars_with_obligations`

I've been auditing the calls to `resolve_vars_with_obligations` for the new solver, and have found a few that have no effect on diagnostics. Let's just remove 'em.

Also remove a redundant `resolve_vars_with_obligations_and_mutate_fulfillment` call.

r? ``@lcnr``
2023-08-10 15:08:54 +02:00
Matthias Krüger 7e3616d685
Rollup merge of #114681 - zamazan4ik:master, r=compiler-errors
doc (unstable-book): fix a typo

Just fix a small typo.
2023-08-10 15:08:54 +02:00
Matthias Krüger 710b989b32
Rollup merge of #114678 - MortenLohne:bugfix/hir-has-side-effects, r=compiler-errors
`Expr::can_have_side_effects()` is incorrect for struct/enum/array/tuple literals

It would return 'false' unless *all* sub-expressions had side effects. This would easily allow side effects to slip through, and also wrongly label empty literals as having side effects. Add some tests for the last point

The function is only used for simple lints and error messages, so not a serious bug.
2023-08-10 15:08:53 +02:00
Matthias Krüger 5b558639f6
Rollup merge of #114674 - clubby789:clubby-vacation, r=compiler-errors
Add clubby789 to `users_on_vacation`

I'm on holiday until the 30th of August so won't be able to take on reviews until then
2023-08-10 15:08:53 +02:00
Matthias Krüger b9648d4c62
Rollup merge of #114278 - ozkanonur:validate-codegen-backend-config, r=clubby789
better error handling for `rust.codegen-backends` on deserialization

Fixes #109315
2023-08-10 15:08:52 +02:00
bors 9fa6bdd764 Auto merge of #112482 - tgross35:ci-non-rust-linters, r=pietroalbini
Add support for tidy linting via external tools for non-rust files

This change adds the flag `--check-extras` to `tidy`. It accepts a comma separated list of any of the options:

* py (test everything applicable for python files)
* py:lint (lint python files using `ruff`)
* py:fmt (check formatting for python files using `black`)
* shell or shell:lint (lint shell files using `shellcheck`)

Specific files to check can also be specified via positional args. Examples:

* `./x test tidy --check-extras=shell,py`
* `./x test tidy --check-extras=py:fmt -- src/bootstrap/bootstrap.py`
* `./x test tidy --check-extras=shell -- src/ci/*.sh`
* Python formatting can be applied with bless: `./x test tidy --ckeck-extras=py:fmt --bless`

`ruff` and `black` need to be installed via pip; this tool manages these within a virtual environment at `build/venv`. `shellcheck` needs to be installed on the system already.

---

This PR doesn't fix any of the errors that show up (I will likely go through those at some point) and it doesn't enforce anything new in CI. Relevant zulip discussion: https://rust-lang.zulipchat.com/#narrow/stream/242791-t-infra/topic/Other.20linters.20in.20CI
2023-08-10 13:07:18 +00:00
lcnr 02529d2cbe add and move trait solver cycle tests 2023-08-10 14:18:31 +02:00
lcnr d558353f28 make the provisional cache slightly less broken 2023-08-10 12:35:34 +02:00
Pietro Albini 26efc2f358
update my entry in the mailmap 2023-08-10 12:24:00 +02:00
Pietro Albini 32e6a2239b
remove myself from the review rotation 2023-08-10 12:20:47 +02:00
lena 7834ffbebe fix #114275
this ICE was caused by `transform_ty`
in compiler/rustc_symbol_mangling/src/typeid/typeid_itanium_cxx_abi.rs
encountering an unevaluated const, while expecting it to already be evaluated.

add a regression test

Update tests/ui/sanitize/issue-114275-cfi-const-expr-in-arry-len.rs

Co-authored-by: Michael Goulet <michael@errs.io>

Update tests/ui/sanitize/issue-114275-cfi-const-expr-in-arry-len.rs

Co-authored-by: Michael Goulet <michael@errs.io>

fix test compiling for targets with -crt-static and failing

this was causign https://github.com/rust-lang/rust/pull/114686 to fail
2023-08-10 11:00:06 +02:00
bors 307c573d57 Auto merge of #114614 - RalfJung:offset-of-sanity, r=cjgillot
offset_of: guard against invalid use (with unsized fields)
2023-08-10 07:54:05 +00:00
bors abc910be6f Auto merge of #114001 - meysam81:issue-111894-fix, r=clubby789
fix(bootstrap): rename exclude flag to skip 🐛

fixes #111894
2023-08-10 04:36:51 +00:00
Michael Goulet 6f8bb9d66d Remove redundant calls to resolve_vars_with_obligations 2023-08-10 04:22:46 +00:00
Michael Goulet 553bfe23d0 Remove redundant method 2023-08-10 04:03:12 +00:00
Alexander Zaitsev f359139e72 Update profile_sample_use.md
Just remove a typo.
2023-08-10 05:18:58 +02:00
bors fd16988600 Auto merge of #114648 - compiler-errors:perf-114604, r=lqd
Only resolve target type in `try_coerce` in new solver

Only needed in new solver, seems to affect perf in old solver.

cc #114604/#114594
2023-08-10 02:00:30 +00:00
Morten Lohne 75d5f107dd Bugfix: 'can_have_side_effects()' would return 'false' for struct/enum/array/tuple literals unless *all* sub-expressions had side effects. This would easily allow side effects to slip through, and also wrongly label empty literals as having side effects. Add some tests for the last point 2023-08-10 02:26:11 +02:00
bors 832db2fcee Auto merge of #114673 - matthiaskrgr:rollup-9kroqpp, r=matthiaskrgr
Rollup of 6 pull requests

Successful merges:

 - #110435 (rustdoc-json: Add test for field ordering.)
 - #111891 (feat: `riscv-interrupt-{m,s}` calling conventions)
 - #114377 (test_get_dbpath_for_term(): handle non-utf8 paths (fix FIXME))
 - #114469 (Detect method not found on arbitrary self type with different mutability)
 - #114587 (Convert Const to Allocation in smir)
 - #114670 (Don't use `type_of` to determine if item has intrinsic shim)

Failed merges:

 - #114599 (Add impl trait declarations to SMIR)

r? `@ghost`
`@rustbot` modify labels: rollup
2023-08-09 23:27:46 +00:00
clubby789 762df46491 Add clubby789 to users_on_vacation 2023-08-09 22:38:30 +01:00
Matthias Krüger a87dda3b3d
Rollup merge of #114670 - compiler-errors:issue-114660, r=cjgillot
Don't use `type_of` to determine if item has intrinsic shim

When we're calling `resolve_instance` on an inline const, we were previously looking at the `type_of` for that const, seeing that it was an `extern "intrinsic"` fn def, and treating it as if we were computing the instance of that intrinsic itself. This is incorrect.

Instead, we should be using the def-id of the item we're computing to determine if it's an intrinsic.

Fixes #114660
2023-08-09 23:00:00 +02:00
Matthias Krüger bbc1109b79
Rollup merge of #114587 - ouz-a:smir_allocation, r=oli-obk
Convert Const to Allocation in smir

Continuation of previous pr https://github.com/rust-lang/rust/pull/114466

cc https://github.com/rust-lang/project-stable-mir/issues/15

r? `@oli-obk`
2023-08-09 23:00:00 +02:00
Matthias Krüger 90c0371ca9
Rollup merge of #114469 - estebank:arbitrary-self-types-mut-diff, r=davidtwco
Detect method not found on arbitrary self type with different mutability

```
error[E0599]: no method named `x` found for struct `Pin<&S>` in the current scope
  --> $DIR/arbitrary_self_type_mut_difference.rs:11:18
   |
LL |     Pin::new(&S).x();
   |                  ^ help: there is a method with a similar name: `y`
   |
note: method is available for `Pin<&mut S>`
  --> $DIR/arbitrary_self_type_mut_difference.rs:6:5
   |
LL |     fn x(self: Pin<&mut Self>) {}
   |     ^^^^^^^^^^^^^^^^^^^^^^^^^^
```

Related to #57994, as one of the presented cases can lead to code like this.
2023-08-09 22:59:59 +02:00
Matthias Krüger 128cc06515
Rollup merge of #114377 - Enselic:test_get_dbpath_for_term-utf-8, r=thomcc
test_get_dbpath_for_term(): handle non-utf8 paths (fix FIXME)

Removes a FIXME for #9639

Part of #44366 which is E-help-wanted

The remaining two FIXMEs for #9639 are considerably more complicated, so I will create separate PRs for them.
2023-08-09 22:59:58 +02:00
Matthias Krüger 7d78885a8e
Rollup merge of #111891 - rustbox:feat/riscv-isr-cconv, r=jackh726
feat: `riscv-interrupt-{m,s}` calling conventions

Similar to prior support added for the mips430, avr, and x86 targets this change implements the rough equivalent of clang's [`__attribute__((interrupt))`][clang-attr] for riscv targets, enabling e.g.

```rust
static mut CNT: usize = 0;

pub extern "riscv-interrupt-m" fn isr_m() {
    unsafe {
        CNT += 1;
    }
}
```

to produce highly effective assembly like:

```asm
pub extern "riscv-interrupt-m" fn isr_m() {
420003a0:       1141                    addi    sp,sp,-16
    unsafe {
        CNT += 1;
420003a2:       c62a                    sw      a0,12(sp)
420003a4:       c42e                    sw      a1,8(sp)
420003a6:       3fc80537                lui     a0,0x3fc80
420003aa:       63c52583                lw      a1,1596(a0) # 3fc8063c <_ZN12esp_riscv_rt3CNT17hcec3e3a214887d53E.0>
420003ae:       0585                    addi    a1,a1,1
420003b0:       62b52e23                sw      a1,1596(a0)
    }
}
420003b4:       4532                    lw      a0,12(sp)
420003b6:       45a2                    lw      a1,8(sp)
420003b8:       0141                    addi    sp,sp,16
420003ba:       30200073                mret
```

(disassembly via `riscv64-unknown-elf-objdump -C -S --disassemble ./esp32c3-hal/target/riscv32imc-unknown-none-elf/release/examples/gpio_interrupt`)

This outcome is superior to hand-coded interrupt routines which, lacking visibility into any non-assembly body of the interrupt handler, have to be very conservative and save the [entire CPU state to the stack frame][full-frame-save]. By instead asking LLVM to only save the registers that it uses, we defer the decision to the tool with the best context: it can more accurately account for the cost of spills if it knows that every additional register used is already at the cost of an implicit spill.

At the LLVM level, this is apparently [implemented by] marking every register as "[callee-save]," matching the semantics of an interrupt handler nicely (it has to leave the CPU state just as it found it after its `{m|s}ret`).

This approach is not suitable for every interrupt handler, as it makes no attempt to e.g. save the state in a user-accessible stack frame. For a full discussion of those challenges and tradeoffs, please refer to [the interrupt calling conventions RFC][rfc].

Inside rustc, this implementation differs from prior art because LLVM does not expose the "all-saved" function flavor as a calling convention directly, instead preferring to use an attribute that allows for differentiating between "machine-mode" and "superivsor-mode" interrupts.

Finally, some effort has been made to guide those who may not yet be aware of the differences between machine-mode and supervisor-mode interrupts as to why no `riscv-interrupt` calling convention is exposed through rustc, and similarly for why `riscv-interrupt-u` makes no appearance (as it would complicate future LLVM upgrades).

[clang-attr]: https://clang.llvm.org/docs/AttributeReference.html#interrupt-risc-v
[full-frame-save]: 9281af2ecf/src/lib.rs (L440-L469)
[implemented by]: b7fb2a3fec/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp (L61-L67)
[callee-save]: 973f1fe7a8/llvm/lib/Target/RISCV/RISCVCallingConv.td (L30-L37)
[rfc]: https://github.com/rust-lang/rfcs/pull/3246
2023-08-09 22:59:58 +02:00
Matthias Krüger 4e7e2a52e2
Rollup merge of #110435 - aDotInTheVoid:rdj-field-ordering, r=GuillaumeGomez
rustdoc-json: Add test for field ordering.

Inspired by [this on twitter](https://twitter.com/PredragGruevski/status/1647705616650043392), the ordering of fields really matters, so we should test we preserve it through json.

r? rustdoc
2023-08-09 22:59:57 +02:00
bors 08d00b40ae Auto merge of #114666 - bjorn3:sync_cg_clif-2023-08-09, r=bjorn3
Sync rustc_codegen_cranelift

A couple of small bug fixes this time. In addition I fixed the test suite after the introduction of `#![deny(internal_feature)]` broke it.

r? `@ghost`

`@rustbot` label +A-codegen +A-cranelift +T-compiler
2023-08-09 20:51:34 +00:00
bors 43c869d1ec Auto merge of #3021 - ttsugriy:bin-search, r=RalfJung
Use Vec's binary search instead of hand-written one.
2023-08-09 20:10:37 +00:00
Ralf Jung 2c69b466ac
expand comment 2023-08-09 22:10:16 +02:00
Michael Goulet d8e3986d42 Don't use type_of to determine if item has intrinsic shim 2023-08-09 20:00:38 +00:00
Taras Tsugrii 1e347e1e73 Use Vec's binary search instead of hand-written one. 2023-08-09 11:35:31 -07:00
bjorn3 37751893cc Merge commit '8f9ac9c22d6594cf059d8e6c71d414cc5ccd7975' into sync_cg_clif-2023-08-09 2023-08-09 18:20:12 +00:00
ouz-a 8f1ea576b7 only allocate bytes within AllocRange 2023-08-09 21:05:03 +03:00
Michael Goulet 214d78daec Only resolve in new solver 2023-08-09 17:00:59 +00:00
bors 27a43f0834 Auto merge of #88936 - estebank:send-sync, r=nagisa
Suggest using `Arc` on `!Send`/`!Sync` types
2023-08-09 15:35:51 +00:00
bors add2722677 Auto merge of #11310 - y21:slow_vector_initialization_doc, r=xFrednet,djc
[`slow_vector_initialization`]: clarify why `Vec::new()` + resize is worse

#11198 extended this lint to also warn on `Vec::new()` + `resize(0, len)`, but did not update the lint documentation, so it left some confused (https://github.com/rust-lang/rust-clippy/issues/10938#issuecomment-1663880083).
This PR should make it a bit more clear. (cc `@djc` `@vi` what do you think about this?)

<details>
<summary>More details</summary>

Godbolt for `Vec::new()` + `.resize(x, 0)`: https://godbolt.org/z/e7q9xc9rG

The resize call first does a normal allocation (`__rust_alloc`):
```asm
alloc::raw_vec::finish_grow:
  ...
  cmp     qword ptr [rcx + 8], 0
  je      .LBB1_7  ; if capacity == 0 -> LBB1_7

.LBB1_7:
  ...
  call    qword ptr [rip + __rust_alloc@GOTPCREL]
```

*Then* a memset for zero initialization:
```asm
example::f:
  ...
  xor     esi, esi  ; 0
  call    qword ptr [rip + memset@GOTPCREL]
```
------------

Godbolt for `vec![0; len]`: https://godbolt.org/z/M3vr53vWY

Important bit:
```asm
example::f:
  ...
  call    qword ptr [rip + __rust_alloc_zeroed@GOTPCREL]
```

</details>

changelog: [`slow_vector_initialization`]: clarify why `Vec::new()` + resize is worse than `vec![0; len]`
2023-08-09 14:48:55 +00:00
Esteban Kuber 9de1a472b6 Suggest using Arc on !Send/!Sync types 2023-08-09 14:04:10 +00:00
y21 dd25cc349b Remove unnecessary paragraph, move examples 2023-08-09 14:48:31 +02:00
Timo d2acfb37b3
Reword paragraph
Co-authored-by: Dirkjan Ochtman <dirkjan@ochtman.nl>
2023-08-09 14:44:42 +02:00
y21 830bac5548 clarify why Vec::new() + resize is worse than vec![0; N] 2023-08-09 14:08:48 +02:00
ouz-a c41339a52f Convert Const to Allocation in smir 2023-08-09 15:00:00 +03:00
bjorn3 8f9ac9c22d Fix MinGW 2023-08-09 10:47:49 +00:00
bors d190d97864 Auto merge of #114649 - Kobzol:bolt-remove-use-old-text, r=nikic
Remove usage of `--use-old-text` for BOLT

This flag has [reduced](https://github.com/rust-lang/rust/pull/114141) the size of `libLLVM.so` by ~50 MiB, but sadly it is quite non-deterministic and the size savings frequently fail, thus causing large artifact size [swings](https://github.com/rust-lang/rust/pull/114297#issuecomment-1670292387). To avoid the swings, it would be better to just disable the flag for now.

r? `@nikic`
2023-08-09 10:41:15 +00:00
bjorn3 716dcb7793 Fix rustc test suite 2023-08-09 10:33:57 +00:00
Esteban Küber 843549e478 review comments 2023-08-09 10:28:53 +00:00
bjorn3 3deb6c69e0 Rustup to rustc 1.73.0-nightly (03a119b0b 2023-08-07) 2023-08-09 10:05:36 +00:00