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https://github.com/rust-lang/rust
synced 2024-10-01 14:25:08 +00:00
Add inline assembly support for m68k
This commit is contained in:
Ian Douglas Scott
parent
5ca6e98f13
commit
2ac8dee44f
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@ -593,6 +593,9 @@ fn reg_to_gcc(reg: InlineAsmRegOrRegClass) -> ConstraintOrRegister {
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InlineAsmRegClass::Bpf(BpfInlineAsmRegClass::reg) => "r",
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InlineAsmRegClass::Bpf(BpfInlineAsmRegClass::wreg) => "w",
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InlineAsmRegClass::Hexagon(HexagonInlineAsmRegClass::reg) => "r",
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InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg) => "r",
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InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_addr) => "a",
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InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_data) => "d",
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InlineAsmRegClass::Mips(MipsInlineAsmRegClass::reg) => "d", // more specific than "r"
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InlineAsmRegClass::Mips(MipsInlineAsmRegClass::freg) => "f",
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InlineAsmRegClass::Msp430(Msp430InlineAsmRegClass::reg) => "r",
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@ -664,6 +667,9 @@ fn dummy_output_type<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, reg: InlineAsmRegCl
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InlineAsmRegClass::Avr(_) => unimplemented!(),
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InlineAsmRegClass::Bpf(_) => unimplemented!(),
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InlineAsmRegClass::Hexagon(HexagonInlineAsmRegClass::reg) => cx.type_i32(),
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InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg) => cx.type_i32(),
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InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_addr) => cx.type_i32(),
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InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_data) => cx.type_i32(),
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InlineAsmRegClass::Mips(MipsInlineAsmRegClass::reg) => cx.type_i32(),
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InlineAsmRegClass::Mips(MipsInlineAsmRegClass::freg) => cx.type_f32(),
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InlineAsmRegClass::Msp430(_) => unimplemented!(),
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@ -849,6 +855,7 @@ fn modifier_to_gcc(arch: InlineAsmArch, reg: InlineAsmRegClass, modifier: Option
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InlineAsmRegClass::Avr(_) => None,
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InlineAsmRegClass::S390x(_) => None,
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InlineAsmRegClass::Msp430(_) => None,
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InlineAsmRegClass::M68k(_) => None,
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InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => {
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bug!("LLVM backend does not support SPIR-V")
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}
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@ -244,6 +244,9 @@ fn codegen_inline_asm(
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InlineAsmArch::Msp430 => {
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constraints.push("~{sr}".to_string());
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}
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InlineAsmArch::M68k => {
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constraints.push("~{ccr}".to_string());
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}
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}
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}
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if !options.contains(InlineAsmOptions::NOMEM) {
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@ -671,6 +674,9 @@ fn reg_to_llvm(reg: InlineAsmRegOrRegClass, layout: Option<&TyAndLayout<'_>>) ->
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InlineAsmRegClass::S390x(S390xInlineAsmRegClass::reg) => "r",
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InlineAsmRegClass::S390x(S390xInlineAsmRegClass::freg) => "f",
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InlineAsmRegClass::Msp430(Msp430InlineAsmRegClass::reg) => "r",
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InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg) => "r",
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InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_addr) => "a",
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InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_data) => "d",
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InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => {
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bug!("LLVM backend does not support SPIR-V")
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}
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@ -768,6 +774,7 @@ fn modifier_to_llvm(
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InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => {
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bug!("LLVM backend does not support SPIR-V")
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}
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InlineAsmRegClass::M68k(_) => None,
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InlineAsmRegClass::Err => unreachable!(),
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}
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}
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@ -839,6 +846,9 @@ fn dummy_output_type<'ll>(cx: &CodegenCx<'ll, '_>, reg: InlineAsmRegClass) -> &'
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InlineAsmRegClass::S390x(S390xInlineAsmRegClass::reg) => cx.type_i32(),
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InlineAsmRegClass::S390x(S390xInlineAsmRegClass::freg) => cx.type_f64(),
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InlineAsmRegClass::Msp430(Msp430InlineAsmRegClass::reg) => cx.type_i16(),
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InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg) => cx.type_i32(),
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InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_addr) => cx.type_i32(),
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InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg_data) => cx.type_i32(),
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InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => {
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bug!("LLVM backend does not support SPIR-V")
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}
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@ -1173,7 +1173,9 @@
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reg32,
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reg64,
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reg_abcd,
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reg_addr,
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reg_byte,
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reg_data,
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reg_iw,
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reg_nonzero,
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reg_pair,
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81
compiler/rustc_target/src/asm/m68k.rs
Normal file
81
compiler/rustc_target/src/asm/m68k.rs
Normal file
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@ -0,0 +1,81 @@
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use super::{InlineAsmArch, InlineAsmType};
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use rustc_macros::HashStable_Generic;
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use rustc_span::Symbol;
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use std::fmt;
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def_reg_class! {
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M68k M68kInlineAsmRegClass {
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reg,
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reg_addr,
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reg_data,
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}
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}
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impl M68kInlineAsmRegClass {
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pub fn valid_modifiers(self, _arch: super::InlineAsmArch) -> &'static [char] {
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&[]
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}
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pub fn suggest_class(self, _arch: InlineAsmArch, _ty: InlineAsmType) -> Option<Self> {
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None
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}
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pub fn suggest_modifier(
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self,
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_arch: InlineAsmArch,
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_ty: InlineAsmType,
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) -> Option<(char, &'static str)> {
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None
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}
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pub fn default_modifier(self, _arch: InlineAsmArch) -> Option<(char, &'static str)> {
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None
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}
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pub fn supported_types(
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self,
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_arch: InlineAsmArch,
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) -> &'static [(InlineAsmType, Option<Symbol>)] {
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match self {
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Self::reg => types! { _: I16, I32; },
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Self::reg_data => types! { _: I8, I16, I32; },
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Self::reg_addr => types! { _: I16, I32; },
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}
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}
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}
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def_regs! {
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M68k M68kInlineAsmReg M68kInlineAsmRegClass {
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d0: reg, reg_data = ["d0"],
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d1: reg, reg_data = ["d1"],
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d2: reg, reg_data = ["d2"],
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d3: reg, reg_data = ["d3"],
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d4: reg, reg_data = ["d4"],
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d5: reg, reg_data = ["d5"],
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d6: reg, reg_data = ["d6"],
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d7: reg, reg_data = ["d7"],
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a0: reg, reg_addr = ["a0"],
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a1: reg, reg_addr = ["a1"],
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a2: reg, reg_addr = ["a2"],
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a3: reg, reg_addr = ["a3"],
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#error = ["a4"] =>
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"a4 is used internally by LLVM and cannot be used as an operand for inline asm",
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#error = ["a5", "bp"] =>
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"a5 is used internally by LLVM and cannot be used as an operand for inline asm",
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#error = ["a6", "fp"] =>
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"a6 is used internally by LLVM and cannot be used as an operand for inline asm",
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#error = ["a7", "sp", "usp", "ssp", "isp"] =>
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"the stack pointer cannot be used as an operand for inline asm",
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}
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}
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impl M68kInlineAsmReg {
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pub fn emit(
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self,
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out: &mut dyn fmt::Write,
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_arch: InlineAsmArch,
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_modifier: Option<char>,
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) -> fmt::Result {
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out.write_str(self.name())
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}
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}
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@ -168,6 +168,7 @@ macro_rules! types {
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mod avr;
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mod bpf;
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mod hexagon;
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mod m68k;
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mod mips;
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mod msp430;
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mod nvptx;
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@ -183,6 +184,7 @@ macro_rules! types {
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pub use avr::{AvrInlineAsmReg, AvrInlineAsmRegClass};
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pub use bpf::{BpfInlineAsmReg, BpfInlineAsmRegClass};
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pub use hexagon::{HexagonInlineAsmReg, HexagonInlineAsmRegClass};
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pub use m68k::{M68kInlineAsmReg, M68kInlineAsmRegClass};
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pub use mips::{MipsInlineAsmReg, MipsInlineAsmRegClass};
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pub use msp430::{Msp430InlineAsmReg, Msp430InlineAsmRegClass};
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pub use nvptx::{NvptxInlineAsmReg, NvptxInlineAsmRegClass};
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@ -214,6 +216,7 @@ pub enum InlineAsmArch {
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Bpf,
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Avr,
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Msp430,
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M68k,
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}
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impl FromStr for InlineAsmArch {
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@ -240,6 +243,7 @@ fn from_str(s: &str) -> Result<InlineAsmArch, ()> {
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"bpf" => Ok(Self::Bpf),
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"avr" => Ok(Self::Avr),
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"msp430" => Ok(Self::Msp430),
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"m68k" => Ok(Self::M68k),
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_ => Err(()),
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}
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}
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@ -262,6 +266,7 @@ pub enum InlineAsmReg {
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Bpf(BpfInlineAsmReg),
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Avr(AvrInlineAsmReg),
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Msp430(Msp430InlineAsmReg),
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M68k(M68kInlineAsmReg),
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// Placeholder for invalid register constraints for the current target
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Err,
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}
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@ -280,6 +285,7 @@ pub fn name(self) -> &'static str {
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Self::Bpf(r) => r.name(),
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Self::Avr(r) => r.name(),
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Self::Msp430(r) => r.name(),
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Self::M68k(r) => r.name(),
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Self::Err => "<reg>",
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}
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}
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@ -297,6 +303,7 @@ pub fn reg_class(self) -> InlineAsmRegClass {
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Self::Bpf(r) => InlineAsmRegClass::Bpf(r.reg_class()),
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Self::Avr(r) => InlineAsmRegClass::Avr(r.reg_class()),
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Self::Msp430(r) => InlineAsmRegClass::Msp430(r.reg_class()),
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Self::M68k(r) => InlineAsmRegClass::M68k(r.reg_class()),
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Self::Err => InlineAsmRegClass::Err,
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}
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}
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@ -328,6 +335,7 @@ pub fn parse(arch: InlineAsmArch, name: Symbol) -> Result<Self, &'static str> {
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InlineAsmArch::Bpf => Self::Bpf(BpfInlineAsmReg::parse(name)?),
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InlineAsmArch::Avr => Self::Avr(AvrInlineAsmReg::parse(name)?),
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InlineAsmArch::Msp430 => Self::Msp430(Msp430InlineAsmReg::parse(name)?),
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InlineAsmArch::M68k => Self::M68k(M68kInlineAsmReg::parse(name)?),
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})
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}
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@ -351,6 +359,7 @@ pub fn validate(
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Self::Bpf(r) => r.validate(arch, reloc_model, target_features, target, is_clobber),
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Self::Avr(r) => r.validate(arch, reloc_model, target_features, target, is_clobber),
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Self::Msp430(r) => r.validate(arch, reloc_model, target_features, target, is_clobber),
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Self::M68k(r) => r.validate(arch, reloc_model, target_features, target, is_clobber),
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Self::Err => unreachable!(),
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}
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}
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@ -375,6 +384,7 @@ pub fn emit(
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Self::Bpf(r) => r.emit(out, arch, modifier),
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Self::Avr(r) => r.emit(out, arch, modifier),
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Self::Msp430(r) => r.emit(out, arch, modifier),
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Self::M68k(r) => r.emit(out, arch, modifier),
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Self::Err => unreachable!("Use of InlineAsmReg::Err"),
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}
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}
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@ -392,6 +402,7 @@ pub fn overlapping_regs(self, mut cb: impl FnMut(InlineAsmReg)) {
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Self::Bpf(r) => r.overlapping_regs(|r| cb(Self::Bpf(r))),
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Self::Avr(r) => r.overlapping_regs(|r| cb(Self::Avr(r))),
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Self::Msp430(_) => cb(self),
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Self::M68k(_) => cb(self),
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Self::Err => unreachable!("Use of InlineAsmReg::Err"),
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}
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}
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@ -414,6 +425,7 @@ pub enum InlineAsmRegClass {
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Bpf(BpfInlineAsmRegClass),
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Avr(AvrInlineAsmRegClass),
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Msp430(Msp430InlineAsmRegClass),
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M68k(M68kInlineAsmRegClass),
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// Placeholder for invalid register constraints for the current target
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Err,
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}
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@ -435,6 +447,7 @@ pub fn name(self) -> Symbol {
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Self::Bpf(r) => r.name(),
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Self::Avr(r) => r.name(),
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Self::Msp430(r) => r.name(),
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Self::M68k(r) => r.name(),
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Self::Err => rustc_span::symbol::sym::reg,
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}
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}
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@ -458,6 +471,7 @@ pub fn suggest_class(self, arch: InlineAsmArch, ty: InlineAsmType) -> Option<Sel
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Self::Bpf(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::Bpf),
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Self::Avr(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::Avr),
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Self::Msp430(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::Msp430),
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Self::M68k(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::M68k),
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Self::Err => unreachable!("Use of InlineAsmRegClass::Err"),
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}
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}
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@ -488,6 +502,7 @@ pub fn suggest_modifier(
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Self::Bpf(r) => r.suggest_modifier(arch, ty),
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Self::Avr(r) => r.suggest_modifier(arch, ty),
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Self::Msp430(r) => r.suggest_modifier(arch, ty),
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Self::M68k(r) => r.suggest_modifier(arch, ty),
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Self::Err => unreachable!("Use of InlineAsmRegClass::Err"),
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}
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}
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@ -514,6 +529,7 @@ pub fn default_modifier(self, arch: InlineAsmArch) -> Option<(char, &'static str
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Self::Bpf(r) => r.default_modifier(arch),
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Self::Avr(r) => r.default_modifier(arch),
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Self::Msp430(r) => r.default_modifier(arch),
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Self::M68k(r) => r.default_modifier(arch),
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Self::Err => unreachable!("Use of InlineAsmRegClass::Err"),
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}
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}
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@ -539,6 +555,7 @@ pub fn supported_types(
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Self::Bpf(r) => r.supported_types(arch),
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Self::Avr(r) => r.supported_types(arch),
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Self::Msp430(r) => r.supported_types(arch),
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Self::M68k(r) => r.supported_types(arch),
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Self::Err => unreachable!("Use of InlineAsmRegClass::Err"),
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}
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}
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@ -569,6 +586,7 @@ pub fn parse(arch: InlineAsmArch, name: Symbol) -> Result<Self, &'static str> {
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InlineAsmArch::Bpf => Self::Bpf(BpfInlineAsmRegClass::parse(name)?),
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InlineAsmArch::Avr => Self::Avr(AvrInlineAsmRegClass::parse(name)?),
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InlineAsmArch::Msp430 => Self::Msp430(Msp430InlineAsmRegClass::parse(name)?),
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InlineAsmArch::M68k => Self::M68k(M68kInlineAsmRegClass::parse(name)?),
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})
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}
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@ -590,6 +608,7 @@ pub fn valid_modifiers(self, arch: InlineAsmArch) -> &'static [char] {
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Self::Bpf(r) => r.valid_modifiers(arch),
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Self::Avr(r) => r.valid_modifiers(arch),
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Self::Msp430(r) => r.valid_modifiers(arch),
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Self::M68k(r) => r.valid_modifiers(arch),
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Self::Err => unreachable!("Use of InlineAsmRegClass::Err"),
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}
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}
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@ -776,6 +795,11 @@ pub fn allocatable_registers(
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msp430::fill_reg_map(arch, reloc_model, target_features, target, &mut map);
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map
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}
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InlineAsmArch::M68k => {
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let mut map = m68k::regclass_map();
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m68k::fill_reg_map(arch, reloc_model, target_features, target, &mut map);
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map
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}
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}
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}
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@ -16,6 +16,7 @@ This feature tracks `asm!` and `global_asm!` support for the following architect
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- SPIR-V
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- AVR
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- MSP430
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- M68k
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## Register classes
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@ -41,6 +42,9 @@ This feature tracks `asm!` and `global_asm!` support for the following architect
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| AVR | `reg_iw` | `r25r24`, `X`, `Z` | `w` |
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| AVR | `reg_ptr` | `X`, `Z` | `e` |
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| MSP430 | `reg` | `r[0-15]` | `r` |
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| M68k | `reg` | `d[0-7]`, `a[0-7]` | `r` |
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| M68k | `reg_data` | `d[0-7]` | `d` |
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| M68k | `reg_addr` | `a[0-3]` | `a` |
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> **Notes**:
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> - NVPTX doesn't have a fixed register set, so named registers are not supported.
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@ -70,6 +74,8 @@ This feature tracks `asm!` and `global_asm!` support for the following architect
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| AVR | `reg`, `reg_upper` | None | `i8` |
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| AVR | `reg_pair`, `reg_iw`, `reg_ptr` | None | `i16` |
|
||||
| MSP430 | `reg` | None | `i8`, `i16` |
|
||||
| M68k | `reg`, `reg_addr` | None | `i16`, `i32` |
|
||||
| M68k | `reg_data` | None | `i8`, `i16`, `i32` |
|
||||
|
||||
## Register aliases
|
||||
|
||||
|
|
@ -88,6 +94,9 @@ This feature tracks `asm!` and `global_asm!` support for the following architect
|
|||
| MSP430 | `r2` | `sr` |
|
||||
| MSP430 | `r3` | `cg` |
|
||||
| MSP430 | `r4` | `fp` |
|
||||
| M68k | `a5` | `bp` |
|
||||
| M68k | `a6` | `fp` |
|
||||
| M68k | `a7` | `sp`, `usp`, `ssp`, `isp` |
|
||||
|
||||
> **Notes**:
|
||||
> - TI does not mandate a frame pointer for MSP430, but toolchains are allowed
|
||||
|
|
@ -98,7 +107,7 @@ This feature tracks `asm!` and `global_asm!` support for the following architect
|
|||
| Architecture | Unsupported register | Reason |
|
||||
| ------------ | --------------------------------------- | ----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- |
|
||||
| All | `sp` | The stack pointer must be restored to its original value at the end of an asm code block. |
|
||||
| All | `fr` (Hexagon), `$fp` (MIPS), `Y` (AVR), `r4` (MSP430) | The frame pointer cannot be used as an input or output. |
|
||||
| All | `fr` (Hexagon), `$fp` (MIPS), `Y` (AVR), `r4` (MSP430), `a6` (M68k) | The frame pointer cannot be used as an input or output. |
|
||||
| All | `r19` (Hexagon) | This is used internally by LLVM as a "base pointer" for functions with complex stack frames. |
|
||||
| MIPS | `$0` or `$zero` | This is a constant zero register which can't be modified. |
|
||||
| MIPS | `$1` or `$at` | Reserved for assembler. |
|
||||
|
|
@ -108,6 +117,7 @@ This feature tracks `asm!` and `global_asm!` support for the following architect
|
|||
| Hexagon | `lr` | This is the link register which cannot be used as an input or output. |
|
||||
| AVR | `r0`, `r1`, `r1r0` | Due to an issue in LLVM, the `r0` and `r1` registers cannot be used as inputs or outputs. If modified, they must be restored to their original values before the end of the block. |
|
||||
|MSP430 | `r0`, `r2`, `r3` | These are the program counter, status register, and constant generator respectively. Neither the status register nor constant generator can be written to. |
|
||||
| M68k | `a4`, `a5` | Used internally by LLVM for the base pointer and global base pointer. |
|
||||
|
||||
## Template modifiers
|
||||
|
||||
|
|
@ -130,3 +140,5 @@ These flags registers must be restored upon exiting the asm block if the `preser
|
|||
- The status register `SREG`.
|
||||
- MSP430
|
||||
- The status register `r2`.
|
||||
- M68k
|
||||
- The condition code register `ccr`.
|
||||
|
|
|
|||
83
tests/assembly/asm/m68k-types.rs
Normal file
83
tests/assembly/asm/m68k-types.rs
Normal file
|
|
@ -0,0 +1,83 @@
|
|||
// assembly-output: emit-asm
|
||||
// compile-flags: --target m68k-unknown-linux-gnu
|
||||
// needs-llvm-components: m68k
|
||||
|
||||
#![feature(no_core, lang_items, rustc_attrs, asm_experimental_arch)]
|
||||
#![crate_type = "rlib"]
|
||||
#![no_core]
|
||||
#![allow(non_camel_case_types)]
|
||||
|
||||
#[rustc_builtin_macro]
|
||||
macro_rules! asm {
|
||||
() => {};
|
||||
}
|
||||
#[rustc_builtin_macro]
|
||||
macro_rules! concat {
|
||||
() => {};
|
||||
}
|
||||
|
||||
#[lang = "sized"]
|
||||
trait Sized {}
|
||||
#[lang = "copy"]
|
||||
trait Copy {}
|
||||
|
||||
type ptr = *const u64;
|
||||
|
||||
impl Copy for i8 {}
|
||||
impl Copy for i16 {}
|
||||
impl Copy for i32 {}
|
||||
impl Copy for i64 {}
|
||||
impl Copy for ptr {}
|
||||
|
||||
macro_rules! check {
|
||||
($func:ident $ty:ident $class:ident $mov:literal) => {
|
||||
#[no_mangle]
|
||||
pub unsafe fn $func(x: $ty) -> $ty {
|
||||
let y;
|
||||
asm!(concat!($mov, " {}, {};"), out($class) y, in($class) x);
|
||||
y
|
||||
}
|
||||
};
|
||||
}
|
||||
|
||||
// CHECK-LABEL: reg_data_i8:
|
||||
// CHECK: ;APP
|
||||
// CHECK: move.b %d{{[0-9]}}, %d{{[0-9]}}
|
||||
// CHECK: ;NO_APP
|
||||
check!(reg_data_i8 i8 reg_data "move.b");
|
||||
|
||||
// CHECK-LABEL: reg_data_i16:
|
||||
// CHECK: ;APP
|
||||
// CHECK: move.w %d{{[0-9]}}, %d{{[0-9]}}
|
||||
// CHECK: ;NO_APP
|
||||
check!(reg_data_i16 i16 reg_data "move.w");
|
||||
|
||||
// CHECK-LABEL: reg_data_i32:
|
||||
// CHECK: ;APP
|
||||
// CHECK: move.l %d{{[0-9]}}, %d{{[0-9]}}
|
||||
// CHECK: ;NO_APP
|
||||
check!(reg_data_i32 i32 reg_data "move.l");
|
||||
|
||||
// CHECK-LABEL: reg_addr_i16:
|
||||
// CHECK: ;APP
|
||||
// CHECK: move.w %a{{[0-9]}}, %a{{[0-9]}}
|
||||
// CHECK: ;NO_APP
|
||||
check!(reg_addr_i16 i16 reg_addr "move.w");
|
||||
|
||||
// CHECK-LABEL: reg_addr_i32:
|
||||
// CHECK: ;APP
|
||||
// CHECK: move.l %a{{[0-9]}}, %a{{[0-9]}}
|
||||
// CHECK: ;NO_APP
|
||||
check!(reg_addr_i32 i32 reg_addr "move.l");
|
||||
|
||||
// CHECK-LABEL: reg_i16:
|
||||
// CHECK: ;APP
|
||||
// CHECK: move.w %{{[da][0-9]}}, %{{[da][0-9]}}
|
||||
// CHECK: ;NO_APP
|
||||
check!(reg_i16 i16 reg "move.w");
|
||||
|
||||
// CHECK-LABEL: reg_i32:
|
||||
// CHECK: ;APP
|
||||
// CHECK: move.l %{{[da][0-9]}}, %{{[da][0-9]}}
|
||||
// CHECK: ;NO_APP
|
||||
check!(reg_i32 i32 reg "move.l");
|
||||
Loading…
Reference in a new issue