languages/go
languages/go
1
0
Fork 0
mirror of https://github.com/golang/go synced 2024-09-15 22:20:06 +00:00
Code Issues Packages Projects Releases Wiki Activity

[dev.ssa] cmd/compile/internal/ssa/gen: Fix *64 strength reduction

Browse source 
*64 is <<6, not <<5.

Change-Id: I2eb7e113d5003b2c77fbd3abc3defc4d98976a5e
Reviewed-on: https://go-review.googlesource.com/12323
Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org>
This commit is contained in:
Keith Randall 2015-07-16 14:20:40 -07:00
parent 3dcc424be7
commit c1593da817
2 changed files with 6 additions and 6 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
src/cmd/compile/internal/ssa/gen/AMD64.rules
View file

@ -112,7 +112,7 @@
// strength reduction
// TODO: do this a lot more generically
(MULQconst [8] x) -> (SHLQconst [3] x)
(MULQconst [64] x) -> (SHLQconst [5] x)
(MULQconst [64] x) -> (SHLQconst [6] x)
// fold add/shift into leaq
(ADDQ x (SHLQconst [3] y)) -> (LEAQ8 x y)

10
src/cmd/compile/internal/ssa/rewriteAMD64.go
View file

@ -1225,22 +1225,22 @@ func rewriteValueAMD64(v *Value, config *Config) bool {
;
// match: (MULQconst [64] x)
// cond:
// result: (SHLQconst [5] x)
// result: (SHLQconst [6] x)
{
if v.AuxInt != 64 {
goto end75c0c250c703f89e6c43d718dd5ea3c0
goto end3e36a587d1e7c193048d489a0429692c
}
x := v.Args[0]
v.Op = OpAMD64SHLQconst
v.AuxInt = 0
v.Aux = nil
v.resetArgs()
v.AuxInt = 5
v.AuxInt = 6
v.AddArg(x)
return true
}
goto end75c0c250c703f89e6c43d718dd5ea3c0
end75c0c250c703f89e6c43d718dd5ea3c0:
goto end3e36a587d1e7c193048d489a0429692c
end3e36a587d1e7c193048d489a0429692c:
;
case OpMove:
// match: (Move [size] dst src mem)