From b71ea0b7dd3009d1fd0a3edd1b80f605c727aa03 Mon Sep 17 00:00:00 2001 From: Ilya Tocar Date: Wed, 27 Jun 2018 17:37:38 -0500 Subject: [PATCH] cmd/compile: mark CMOVLEQF, CMOVWEQF as cloberring AX Code generation for OpAMD64CMOV[WLQ]EQF uses AX as a scratch register, but only CMOVQEQF, correctly lets compiler know. Mark other 2 as clobbering AX. Fixes #26097 Change-Id: I2a65bd67bf18a540898b4a0ae6c8766e0b767b19 Reviewed-on: https://go-review.googlesource.com/121336 Run-TryBot: Ilya Tocar TryBot-Result: Gobot Gobot Reviewed-by: Heschi Kreinick Reviewed-by: Giovanni Bajo --- src/cmd/compile/internal/ssa/gen/AMD64Ops.go | 4 +- src/cmd/compile/internal/ssa/opGen.go | 10 +++-- test/fixedbugs/issue26097.go | 47 ++++++++++++++++++++ 3 files changed, 55 insertions(+), 6 deletions(-) create mode 100644 test/fixedbugs/issue26097.go diff --git a/src/cmd/compile/internal/ssa/gen/AMD64Ops.go b/src/cmd/compile/internal/ssa/gen/AMD64Ops.go index 28694e435e..5a8634abd1 100644 --- a/src/cmd/compile/internal/ssa/gen/AMD64Ops.go +++ b/src/cmd/compile/internal/ssa/gen/AMD64Ops.go @@ -397,11 +397,11 @@ func init() { {name: "CMOVQNEF", argLength: 3, reg: gp21, asm: "CMOVQNE", resultInArg0: true}, {name: "CMOVQGTF", argLength: 3, reg: gp21, asm: "CMOVQHI", resultInArg0: true}, {name: "CMOVQGEF", argLength: 3, reg: gp21, asm: "CMOVQCC", resultInArg0: true}, - {name: "CMOVLEQF", argLength: 3, reg: gp21, asm: "CMOVLNE", resultInArg0: true}, + {name: "CMOVLEQF", argLength: 3, reg: gp21pax, asm: "CMOVLNE", resultInArg0: true}, {name: "CMOVLNEF", argLength: 3, reg: gp21, asm: "CMOVLNE", resultInArg0: true}, {name: "CMOVLGTF", argLength: 3, reg: gp21, asm: "CMOVLHI", resultInArg0: true}, {name: "CMOVLGEF", argLength: 3, reg: gp21, asm: "CMOVLCC", resultInArg0: true}, - {name: "CMOVWEQF", argLength: 3, reg: gp21, asm: "CMOVWNE", resultInArg0: true}, + {name: "CMOVWEQF", argLength: 3, reg: gp21pax, asm: "CMOVWNE", resultInArg0: true}, {name: "CMOVWNEF", argLength: 3, reg: gp21, asm: "CMOVWNE", resultInArg0: true}, {name: "CMOVWGTF", argLength: 3, reg: gp21, asm: "CMOVWHI", resultInArg0: true}, {name: "CMOVWGEF", argLength: 3, reg: gp21, asm: "CMOVWCC", resultInArg0: true}, diff --git a/src/cmd/compile/internal/ssa/opGen.go b/src/cmd/compile/internal/ssa/opGen.go index 01ce5e9e7d..4924947d8b 100644 --- a/src/cmd/compile/internal/ssa/opGen.go +++ b/src/cmd/compile/internal/ssa/opGen.go @@ -7956,11 +7956,12 @@ var opcodeTable = [...]opInfo{ asm: x86.ACMOVLNE, reg: regInfo{ inputs: []inputInfo{ - {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 + {0, 65518}, // CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 }, + clobbers: 1, // AX outputs: []outputInfo{ - {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 + {0, 65518}, // CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 }, }, }, @@ -8016,11 +8017,12 @@ var opcodeTable = [...]opInfo{ asm: x86.ACMOVWNE, reg: regInfo{ inputs: []inputInfo{ - {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 + {0, 65518}, // CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 }, + clobbers: 1, // AX outputs: []outputInfo{ - {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 + {0, 65518}, // CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 }, }, }, diff --git a/test/fixedbugs/issue26097.go b/test/fixedbugs/issue26097.go new file mode 100644 index 0000000000..eedd6bacd0 --- /dev/null +++ b/test/fixedbugs/issue26097.go @@ -0,0 +1,47 @@ +// run + +// Copyright 2018 The Go Authors. All rights reserved. +// Use of this source code is governed by a BSD-style +// license that can be found in the LICENSE file. + +package main + +//go:noinline +func cmovClobberAX64(v1, v2 int64, x1, x2 float64) int64 { + r := v1 + if x1 == x2 { + r = v2 + } + return r +} + +//go:noinline +func cmovClobberAX32(v1, v2 int32, x1, x2 float64) int32 { + r := v1 + if x1 == x2 { + r = v2 + } + return r +} + +//go:noinline +func cmovClobberAX16(v1, v2 int16, x1, x2 float64) int16 { + r := v1 + if x1 == x2 { + r = v2 + } + return r +} + +func main() { + if cmovClobberAX16(1, 2, 4.0, 5.0) != 1 { + panic("CMOVQEQF causes incorrect code") + } + if cmovClobberAX32(1, 2, 4.0, 5.0) != 1 { + panic("CMOVQEQF causes incorrect code") + } + if cmovClobberAX64(1, 2, 4.0, 5.0) != 1 { + panic("CMOVQEQF causes incorrect code") + } + +}