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runtime: implement asyncPreempt for linux/loong64

Browse source 
Contributors to the loong64 port are:
  Weining Lu <luweining@loongson.cn>
  Lei Wang <wanglei@loongson.cn>
  Lingqin Gong <gonglingqin@loongson.cn>
  Xiaolin Zhao <zhaoxiaolin@loongson.cn>
  Meidan Li <limeidan@loongson.cn>
  Xiaojuan Zhai <zhaixiaojuan@loongson.cn>
  Qiyuan Pu <puqiyuan@loongson.cn>
  Guoqi Chen <chenguoqi@loongson.cn>

This port has been updated to Go 1.15.6:
  https://github.com/loongson/go

Updates #46229

Change-Id: I7a64e38b15a99816bd74262c02f62dad021cc166
Reviewed-on: https://go-review.googlesource.com/c/go/+/368078
Reviewed-by: Cherry Mui <cherryyz@google.com>
Reviewed-by: Ian Lance Taylor <iant@google.com>
Auto-Submit: Ian Lance Taylor <iant@google.com>
Reviewed-by: David Chase <drchase@google.com>
Run-TryBot: Ian Lance Taylor <iant@google.com>
TryBot-Result: Gopher Robot <gobot@golang.org>
This commit is contained in:
Xiaodong Liu 2021-12-01 17:15:16 +08:00 committed by Gopher Robot
parent c087121daf
commit 740b0ebb76
2 changed files with 170 additions and 0 deletions
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41
src/runtime/mkpreempt.go
View file

@ -80,6 +80,7 @@ var arches = map[string]func(){
"amd64": genAMD64,
"arm": genARM,
"arm64": genARM64,
"loong64": genLoong64,
"mips64x": func() { genMIPS(true) },
"mipsx": func() { genMIPS(false) },
"ppc64x": genPPC64,
@ -451,6 +452,46 @@ func genMIPS(_64bit bool) {
p("JMP (R23)")
}
func genLoong64() {
mov := "MOVV"
movf := "MOVD"
add := "ADDV"
sub := "SUBV"
r31 := "RSB"
regsize := 8
// Add integer registers r4-r21 r23-r29 r31
// R0 (zero), R30 (REGTMP), R2 (tp), R3 (SP), R22 (g), R1 (LR) are special,
var l = layout{sp: "R3", stack: regsize} // add slot to save PC of interrupted instruction (in LR)
for i := 4; i <= 29; i++ {
if i == 22 {
continue // R3 is REGSP R22 is g
}
reg := fmt.Sprintf("R%d", i)
l.add(mov, reg, regsize)
}
l.add(mov, r31, regsize)
// Add floating point registers F0-F31.
for i := 0; i <= 31; i++ {
reg := fmt.Sprintf("F%d", i)
l.add(movf, reg, regsize)
}
// allocate frame, save PC of interrupted instruction (in LR)
p(mov+" R1, -%d(R3)", l.stack)
p(sub+" $%d, R3", l.stack)
l.save()
p("CALL ·asyncPreempt2(SB)")
l.restore()
p(mov+" %d(R3), R1", l.stack) // sigctxt.pushCall has pushed LR (at interrupt) on stack, restore it
p(mov + " (R3), R30") // load PC to REGTMP
p(add+" $%d, R3", l.stack+regsize) // pop frame (including the space pushed by sigctxt.pushCall)
p("JMP (R30)")
}
func genPPC64() {
// Add integer registers R3-R29
// R0 (zero), R1 (SP), R30 (g) are special and not saved here.

129
src/runtime/preempt_loong64.s Normal file
View file

@ -0,0 +1,129 @@
// Code generated by mkpreempt.go; DO NOT EDIT.
#include "go_asm.h"
#include "textflag.h"
TEXT ·asyncPreempt(SB),NOSPLIT|NOFRAME,$0-0
MOVV R1, -472(R3)
SUBV $472, R3
MOVV R4, 8(R3)
MOVV R5, 16(R3)
MOVV R6, 24(R3)
MOVV R7, 32(R3)
MOVV R8, 40(R3)
MOVV R9, 48(R3)
MOVV R10, 56(R3)
MOVV R11, 64(R3)
MOVV R12, 72(R3)
MOVV R13, 80(R3)
MOVV R14, 88(R3)
MOVV R15, 96(R3)
MOVV R16, 104(R3)
MOVV R17, 112(R3)
MOVV R18, 120(R3)
MOVV R19, 128(R3)
MOVV R20, 136(R3)
MOVV R21, 144(R3)
MOVV R23, 152(R3)
MOVV R24, 160(R3)
MOVV R25, 168(R3)
MOVV R26, 176(R3)
MOVV R27, 184(R3)
MOVV R28, 192(R3)
MOVV R29, 200(R3)
MOVV RSB, 208(R3)
MOVD F0, 216(R3)
MOVD F1, 224(R3)
MOVD F2, 232(R3)
MOVD F3, 240(R3)
MOVD F4, 248(R3)
MOVD F5, 256(R3)
MOVD F6, 264(R3)
MOVD F7, 272(R3)
MOVD F8, 280(R3)
MOVD F9, 288(R3)
MOVD F10, 296(R3)
MOVD F11, 304(R3)
MOVD F12, 312(R3)
MOVD F13, 320(R3)
MOVD F14, 328(R3)
MOVD F15, 336(R3)
MOVD F16, 344(R3)
MOVD F17, 352(R3)
MOVD F18, 360(R3)
MOVD F19, 368(R3)
MOVD F20, 376(R3)
MOVD F21, 384(R3)
MOVD F22, 392(R3)
MOVD F23, 400(R3)
MOVD F24, 408(R3)
MOVD F25, 416(R3)
MOVD F26, 424(R3)
MOVD F27, 432(R3)
MOVD F28, 440(R3)
MOVD F29, 448(R3)
MOVD F30, 456(R3)
MOVD F31, 464(R3)
CALL ·asyncPreempt2(SB)
MOVD 464(R3), F31
MOVD 456(R3), F30
MOVD 448(R3), F29
MOVD 440(R3), F28
MOVD 432(R3), F27
MOVD 424(R3), F26
MOVD 416(R3), F25
MOVD 408(R3), F24
MOVD 400(R3), F23
MOVD 392(R3), F22
MOVD 384(R3), F21
MOVD 376(R3), F20
MOVD 368(R3), F19
MOVD 360(R3), F18
MOVD 352(R3), F17
MOVD 344(R3), F16
MOVD 336(R3), F15
MOVD 328(R3), F14
MOVD 320(R3), F13
MOVD 312(R3), F12
MOVD 304(R3), F11
MOVD 296(R3), F10
MOVD 288(R3), F9
MOVD 280(R3), F8
MOVD 272(R3), F7
MOVD 264(R3), F6
MOVD 256(R3), F5
MOVD 248(R3), F4
MOVD 240(R3), F3
MOVD 232(R3), F2
MOVD 224(R3), F1
MOVD 216(R3), F0
MOVV 208(R3), RSB
MOVV 200(R3), R29
MOVV 192(R3), R28
MOVV 184(R3), R27
MOVV 176(R3), R26
MOVV 168(R3), R25
MOVV 160(R3), R24
MOVV 152(R3), R23
MOVV 144(R3), R21
MOVV 136(R3), R20
MOVV 128(R3), R19
MOVV 120(R3), R18
MOVV 112(R3), R17
MOVV 104(R3), R16
MOVV 96(R3), R15
MOVV 88(R3), R14
MOVV 80(R3), R13
MOVV 72(R3), R12
MOVV 64(R3), R11
MOVV 56(R3), R10
MOVV 48(R3), R9
MOVV 40(R3), R8
MOVV 32(R3), R7
MOVV 24(R3), R6
MOVV 16(R3), R5
MOVV 8(R3), R4
MOVV 472(R3), R1
MOVV (R3), R30
ADDV $480, R3
JMP (R30)