diff --git a/src/cmd/compile/internal/ssa/gen/RISCV64.rules b/src/cmd/compile/internal/ssa/gen/RISCV64.rules index fd5bfd36c6..e37c7b7899 100644 --- a/src/cmd/compile/internal/ssa/gen/RISCV64.rules +++ b/src/cmd/compile/internal/ssa/gen/RISCV64.rules @@ -697,6 +697,16 @@ (MOVBUreg x:(Select0 (LoweredAtomicCas32 _ _ _ _))) => (MOVDreg x) (MOVBUreg x:(Select0 (LoweredAtomicCas64 _ _ _ _))) => (MOVDreg x) +// Avoid sign extension after word arithmetic. +(MOVWreg x:(ADDIW _)) => (MOVDreg x) +(MOVWreg x:(SUBW _ _)) => (MOVDreg x) +(MOVWreg x:(NEGW _)) => (MOVDreg x) +(MOVWreg x:(MULW _ _)) => (MOVDreg x) +(MOVWreg x:(DIVW _ _)) => (MOVDreg x) +(MOVWreg x:(DIVUW _ _)) => (MOVDreg x) +(MOVWreg x:(REMW _ _)) => (MOVDreg x) +(MOVWreg x:(REMUW _ _)) => (MOVDreg x) + // Fold double extensions. (MOVBreg x:(MOVBreg _)) => (MOVDreg x) (MOVHreg x:(MOVBreg _)) => (MOVDreg x) diff --git a/src/cmd/compile/internal/ssa/rewriteRISCV64.go b/src/cmd/compile/internal/ssa/rewriteRISCV64.go index 66b729f046..6f949707a1 100644 --- a/src/cmd/compile/internal/ssa/rewriteRISCV64.go +++ b/src/cmd/compile/internal/ssa/rewriteRISCV64.go @@ -5027,6 +5027,94 @@ func rewriteValueRISCV64_OpRISCV64MOVWreg(v *Value) bool { v.AddArg(x) return true } + // match: (MOVWreg x:(ADDIW _)) + // result: (MOVDreg x) + for { + x := v_0 + if x.Op != OpRISCV64ADDIW { + break + } + v.reset(OpRISCV64MOVDreg) + v.AddArg(x) + return true + } + // match: (MOVWreg x:(SUBW _ _)) + // result: (MOVDreg x) + for { + x := v_0 + if x.Op != OpRISCV64SUBW { + break + } + v.reset(OpRISCV64MOVDreg) + v.AddArg(x) + return true + } + // match: (MOVWreg x:(NEGW _)) + // result: (MOVDreg x) + for { + x := v_0 + if x.Op != OpRISCV64NEGW { + break + } + v.reset(OpRISCV64MOVDreg) + v.AddArg(x) + return true + } + // match: (MOVWreg x:(MULW _ _)) + // result: (MOVDreg x) + for { + x := v_0 + if x.Op != OpRISCV64MULW { + break + } + v.reset(OpRISCV64MOVDreg) + v.AddArg(x) + return true + } + // match: (MOVWreg x:(DIVW _ _)) + // result: (MOVDreg x) + for { + x := v_0 + if x.Op != OpRISCV64DIVW { + break + } + v.reset(OpRISCV64MOVDreg) + v.AddArg(x) + return true + } + // match: (MOVWreg x:(DIVUW _ _)) + // result: (MOVDreg x) + for { + x := v_0 + if x.Op != OpRISCV64DIVUW { + break + } + v.reset(OpRISCV64MOVDreg) + v.AddArg(x) + return true + } + // match: (MOVWreg x:(REMW _ _)) + // result: (MOVDreg x) + for { + x := v_0 + if x.Op != OpRISCV64REMW { + break + } + v.reset(OpRISCV64MOVDreg) + v.AddArg(x) + return true + } + // match: (MOVWreg x:(REMUW _ _)) + // result: (MOVDreg x) + for { + x := v_0 + if x.Op != OpRISCV64REMUW { + break + } + v.reset(OpRISCV64MOVDreg) + v.AddArg(x) + return true + } // match: (MOVWreg x:(MOVBreg _)) // result: (MOVDreg x) for {