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cmd/asm: rename R18 to R18_PLATFORM on ARM64
In ARM64 ABI, R18 is the "platform register", the use of which is OS specific. The OS could choose to reserve this register. In practice, it seems fine to use R18 on Linux but not on darwin (iOS). Rename R18 to R18_PLATFORM to prevent accidental use. There is no R18 usage within the standard library (besides tests, which are updated). Fixes #26110 Change-Id: Icef7b9549e2049db1df307a0180a3c90a12d7a84 Reviewed-on: https://go-review.googlesource.com/c/147218 Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org>
This commit is contained in:
parent
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@ -740,6 +740,7 @@ The ARM64 port is in an experimental state.
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<p>
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<code>R18</code> is the "platform register", reserved on the Apple platform.
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To prevent accidental misuse, the register is named <code>R18_PLATFORM</code>.
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<code>R27</code> and <code>R28</code> are reserved by the compiler and linker.
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<code>R29</code> is the frame pointer.
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<code>R30</code> is the link register.
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@ -258,6 +258,9 @@ func archArm64() *Arch {
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for i := arm64.REG_R0; i <= arm64.REG_R31; i++ {
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register[obj.Rconv(i)] = int16(i)
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}
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// Rename R18 to R18_PLATFORM to avoid accidental use.
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register["R18_PLATFORM"] = register["R18"]
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delete(register, "R18")
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for i := arm64.REG_F0; i <= arm64.REG_F31; i++ {
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register[obj.Rconv(i)] = int16(i)
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}
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@ -607,6 +607,7 @@ var arm64OperandTests = []operandTest{
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{"R0", "R0"},
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{"R10", "R10"},
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{"R11", "R11"},
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{"R18_PLATFORM", "R18"},
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{"$4503601774854144.0", "$(4503601774854144.0)"},
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{"$runtime·badsystemstack(SB)", "$runtime.badsystemstack(SB)"},
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{"ZR", "ZR"},
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8
src/cmd/asm/internal/asm/testdata/arm64.s
vendored
8
src/cmd/asm/internal/asm/testdata/arm64.s
vendored
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@ -47,8 +47,8 @@ TEXT foo(SB), DUPOK|NOSPLIT, $-8
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ADD R2.SXTX<<1, RSP, RSP // ffe7228b
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ADD ZR.SXTX<<1, R2, R3 // 43e43f8b
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ADDW R2.SXTW, R10, R12 // 4cc1220b
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ADD R18.UXTX, R14, R17 // d161328b
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ADDSW R18.UXTW, R14, R17 // d141322b
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ADD R19.UXTX, R14, R17 // d161338b
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ADDSW R19.UXTW, R14, R17 // d141332b
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ADDS R12.SXTX, R3, R1 // 61e02cab
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SUB R19.UXTH<<4, R2, R21 // 553033cb
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SUBW R1.UXTX<<1, R3, R2 // 6264214b
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@ -144,7 +144,7 @@ TEXT foo(SB), DUPOK|NOSPLIT, $-8
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MOVD (R2)(R6.SXTW), R4 // 44c866f8
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MOVD (R3)(R6), R5 // MOVD (R3)(R6*1), R5 // 656866f8
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MOVD (R2)(R6), R4 // MOVD (R2)(R6*1), R4 // 446866f8
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MOVWU (R19)(R18<<2), R18 // 727a72b8
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MOVWU (R19)(R20<<2), R20 // 747a74b8
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MOVD (R2)(R6<<3), R4 // 447866f8
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MOVD (R3)(R7.SXTX<<3), R8 // 68f867f8
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MOVWU (R5)(R4.UXTW), R10 // aa4864b8
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@ -154,7 +154,7 @@ TEXT foo(SB), DUPOK|NOSPLIT, $-8
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MOVHU (R1)(R2<<1), R5 // 25786278
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MOVB (R9)(R3.UXTW), R6 // 2649a338
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MOVB (R10)(R6), R15 // MOVB (R10)(R6*1), R15 // 4f69a638
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MOVH (R5)(R7.SXTX<<1), R18 // b2f8a778
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MOVH (R5)(R7.SXTX<<1), R19 // b3f8a778
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MOVH (R8)(R4<<1), R10 // 0a79a478
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MOVW (R9)(R8.SXTW<<2), R19 // 33d9a8b8
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MOVW (R1)(R4.SXTX), R11 // 2be8a4b8
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54
src/cmd/asm/internal/asm/testdata/arm64enc.s
vendored
54
src/cmd/asm/internal/asm/testdata/arm64enc.s
vendored
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@ -56,7 +56,7 @@ TEXT asmtest(SB),DUPOK|NOSPLIT,$-8
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BFXILW $3, R27, $23, R14 // 6e670333
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BFXIL $26, R8, $16, R20 // 14a55ab3
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BICW R7@>15, R5, R16 // b03ce70a
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BIC R12@>13, R12, R18 // 9235ec8a
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BIC R12@>13, R12, R19 // 9335ec8a
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BICSW R25->20, R3, R20 // 7450b96a
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BICS R19->12, R1, R23 // 3730b3ea
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BICS R19, R1, R23 // 370033ea
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@ -76,7 +76,7 @@ TEXT asmtest(SB),DUPOK|NOSPLIT,$-8
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CCMN LE, R30, R12, $6 // c6d34cba
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CCMPW VS, R29, $15, $7 // a76b4f7a
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CCMP LE, R7, $19, $3 // e3d853fa
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CCMPW HS, R18, R6, $0 // 4022467a
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CCMPW HS, R19, R6, $0 // 6022467a
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CCMP LT, R30, R6, $7 // c7b346fa
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CCMN MI, ZR, R1, $4 // e44341ba
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CSINCW HS, ZR, R27, R14 // ee279b1a
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@ -118,7 +118,7 @@ TEXT asmtest(SB),DUPOK|NOSPLIT,$-8
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CRC32H R3, R21, R27 // bb46c31a
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CRC32W R22, R30, R9 // c94bd61a
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CRC32X R20, R4, R15 // 8f4cd49a
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CRC32CB R18, R27, R22 // 7653d21a
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CRC32CB R19, R27, R22 // 7653d31a
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CRC32CH R21, R0, R20 // 1454d51a
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CRC32CW R9, R3, R21 // 7558c91a
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CRC32CX R11, R0, R24 // 185ccb9a
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@ -133,7 +133,7 @@ TEXT asmtest(SB),DUPOK|NOSPLIT,$-8
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CSINVW AL, R23, R21, R5 // e5e2955a
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CSINV LO, R2, R11, R14 // 4e308bda
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CSNEGW HS, R16, R29, R10 // 0a269d5a
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CSNEG NE, R21, R18, R11 // ab1692da
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CSNEG NE, R21, R19, R11 // ab1693da
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//TODO DC
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DCPS1 $11378 // 418ea5d4
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DCPS2 $10699 // 6239a5d4
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@ -185,23 +185,23 @@ TEXT asmtest(SB),DUPOK|NOSPLIT,$-8
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MOVBU.P 42(R2), R12 // 4ca44238
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MOVBU.W -27(R2), R14 // 4e5c5e38
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MOVBU 2916(R24), R3 // 03936d39
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MOVBU (R18)(R14<<0), R23 // 577a6e38
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MOVBU (R19)(R14<<0), R23 // 777a6e38
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MOVBU (R2)(R8.SXTX), R19 // 53e86838
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MOVBU (R27)(R23), R14 // MOVBU (R27)(R23*1), R14 // 6e6b7738
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MOVHU.P 107(R14), R13 // cdb54678
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MOVHU.W 192(R3), R2 // 620c4c78
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MOVHU 6844(R4), R18 // 92787579
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MOVHU 6844(R4), R19 // 93787579
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MOVHU (R5)(R25.SXTW), R15 // afc87978
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//TODO MOVBW.P 77(R18), R11 // 4bd6c438
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//TODO MOVBW.P 77(R19), R11 // 6bd6c438
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MOVB.P 36(RSP), R27 // fb478238
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//TODO MOVBW.W -57(R18), R13 // 4d7edc38
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//TODO MOVBW.W -57(R19), R13 // 6d7edc38
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MOVB.W -178(R16), R24 // 18ee9438
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//TODO MOVBW 430(R8), R22 // 16b9c639
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MOVB 997(R9), R23 // 37958f39
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//TODO MOVBW (R2<<1)(R21), R15 // af7ae238
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//TODO MOVBW (R26)(R0), R21 // 1568fa38
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MOVB (R5)(R15), R16 // MOVB (R5)(R15*1), R16 // b068af38
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MOVB (R18)(R26.SXTW), R19 // 53caba38
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MOVB (R19)(R26.SXTW), R19 // 73caba38
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MOVB (R29)(R30), R14 // MOVB (R29)(R30*1), R14 // ae6bbe38
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//TODO MOVHW.P 218(R22), R25 // d9a6cd78
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MOVH.P 179(R23), R5 // e5368b78
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@ -212,7 +212,7 @@ TEXT asmtest(SB),DUPOK|NOSPLIT,$-8
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//TODO MOVHW (R22)(R24.SXTX), R4 // c4eaf878
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MOVH (R26)(R30.UXTW<<1), ZR // 5f5bbe78
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MOVW.P -58(R16), R2 // 02669cb8
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MOVW.W -216(R18), R8 // 488e92b8
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MOVW.W -216(R19), R8 // 688e92b8
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MOVW 4764(R23), R10 // ea9e92b9
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MOVW (R8)(R3.UXTW), R17 // 1149a3b8
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//TODO LDTR -0x1e(R3), R4 // 64285eb8
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@ -297,7 +297,7 @@ TEXT asmtest(SB),DUPOK|NOSPLIT,$-8
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RET // c0035fd6
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REVW R8, R10 // 0a09c05a
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REV R1, R2 // 220cc0da
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REV16W R21, R18 // b206c05a
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REV16W R21, R19 // b306c05a
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REV16 R25, R4 // 2407c0da
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REV32 R27, R21 // 750bc0da
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EXTRW $27, R4, R25, R19 // 336f8413
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@ -308,7 +308,7 @@ TEXT asmtest(SB),DUPOK|NOSPLIT,$-8
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ROR R0, R23, R2 // e22ec09a
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SBCW R4, R8, R24 // 1801045a
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SBC R25, R10, R26 // 5a0119da
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SBCSW R27, R18, R18 // 52021b7a
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SBCSW R27, R19, R19 // 73021b7a
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SBCS R5, R9, R5 // 250105fa
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SBFIZW $9, R10, $18, R22 // 56451713
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SBFIZ $6, R11, $15, R20 // 74397a93
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@ -337,7 +337,7 @@ TEXT asmtest(SB),DUPOK|NOSPLIT,$-8
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//TODO STNPW 44(R1), R3, R10 // 2a8c0528
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//TODO STNP 0x108(R3), ZR, R7 // 67fc10a8
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LDP.P -384(R3), (R22, R26) // 7668e8a8
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LDP.W 280(R8), (R18, R11) // 12add1a9
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LDP.W 280(R8), (R19, R11) // 13add1a9
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STP.P (R22, R27), 352(R0) // 166c96a8
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STP.W (R17, R11), 96(R8) // 112d86a9
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MOVW.P R20, -28(R1) // 34441eb8
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@ -360,22 +360,22 @@ TEXT asmtest(SB),DUPOK|NOSPLIT,$-8
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MOVB R2, (R29)(R26) // MOVB R2, (R29)(R26*1) // a26b3a38
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MOVH R11, -80(R23) // eb021b78
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MOVH R11, (R27)(R14.SXTW<<1) // 6bdb2e78
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MOVB R18, (R0)(R4) // MOVB R18, (R0)(R4*1) // 12682438
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MOVB R19, (R0)(R4) // MOVB R19, (R0)(R4*1) // 13682438
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MOVB R1, (R6)(R4) // MOVB R1, (R6)(R4*1) // c1682438
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MOVH R3, (R11)(R13<<1) // 63792d78
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//TODO STTR 55(R4), R29 // 9d7803b8
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//TODO STTR 124(R5), R25 // b9c807f8
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//TODO STTRB -28(R23), R16 // f04a1e38
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//TODO STTRH 9(R10), R18 // 52990078
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//TODO STTRH 9(R10), R19 // 53990078
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STXP (R1, R2), (R3), R10 // 61082ac8
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STXP (R1, R2), (RSP), R10 // e10b2ac8
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STXPW (R1, R2), (R3), R10 // 61082a88
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STXPW (R1, R2), (RSP), R10 // e10b2a88
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STXRW R2, (R19), R18 // 627e1288
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STXRW R2, (R19), R20 // 627e1488
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STXR R15, (R21), R13 // af7e0dc8
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STXRB R7, (R9), R24 // 277d1808
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STXRH R12, (R3), R8 // 6c7c0848
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SUBW R20.UXTW<<2, R23, R18 // f24a344b
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SUBW R20.UXTW<<2, R23, R19 // f34a344b
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SUB R5.SXTW<<2, R1, R26 // 3ac825cb
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SUB $(1923<<12), R4, R27 // SUB $7876608, R4, R27 // 9b0c5ed1
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SUBW $(1923<<12), R4, R27 // SUBW $7876608, R4, R27 // 9b0c5e51
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@ -410,12 +410,12 @@ TEXT asmtest(SB),DUPOK|NOSPLIT,$-8
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UBFXW $3, R7, $20, R15 // ef580353
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UBFX $33, R17, $25, R5 // 25e661d3
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UDIVW R8, R21, R15 // af0ac81a
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UDIV R2, R18, R21 // 550ac29a
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UDIV R2, R19, R21 // 750ac29a
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UMADDL R0, R20, R17, R17 // 3152a09b
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UMSUBL R22, R4, R3, R7 // 6790b69b
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UMNEGL R3, R18, R1 // 41fea39b
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UMNEGL R3, R19, R1 // 61fea39b
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UMULH R24, R20, R24 // 987ed89b
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UMULL R18, R22, R19 // d37eb29b
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UMULL R19, R22, R19 // d37eb39b
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UXTBW R2, R6 // 461c0053
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UXTHW R7, R20 // f43c0053
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VCNT V0.B8, V0.B8 // 0058200e
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@ -471,7 +471,7 @@ TEXT asmtest(SB),DUPOK|NOSPLIT,$-8
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//TODO FCVTAS F27, R7 // 6703241e
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//TODO FCVTAS F19, R26 // 7a02249e
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//TODO FCVTAS F4, R0 // 8000641e
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//TODO FCVTAS F3, R18 // 7200649e
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//TODO FCVTAS F3, R19 // 7300649e
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//TODO FCVTAU F18, F28 // 5cca217e
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//TODO VFCVTAU V30.S4, V27.S4 // dbcb216e
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//TODO FCVTAU F0, R2 // 0200251e
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@ -482,16 +482,16 @@ TEXT asmtest(SB),DUPOK|NOSPLIT,$-8
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//TODO VFCVTL2 V15.H8, V25.S4 // f979214e
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//TODO FCVTMS F21, F28 // bcba215e
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//TODO VFCVTMS V5.D2, V2.D2 // a2b8614e
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//TODO FCVTMS F31, R18 // f203301e
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//TODO FCVTMS F31, R19 // f303301e
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//TODO FCVTMS F23, R16 // f002309e
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//TODO FCVTMS F16, R22 // 1602701e
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//TODO FCVTMS F14, R19 // d301709e
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//TODO FCVTMU F14, F8 // c8b9217e
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//TODO VFCVTMU V7.D2, V1.D2 // e1b8616e
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//TODO FCVTMU F2, R0 // 4000311e
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//TODO FCVTMU F23, R18 // f202319e
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//TODO FCVTMU F23, R19 // f302319e
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//TODO FCVTMU F16, R17 // 1102711e
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//TODO FCVTMU F12, R18 // 9201719e
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//TODO FCVTMU F12, R19 // 9301719e
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//TODO VFCVTN V23.D2, V26.S2 // fa6a610e
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//TODO VFCVTN2 V2.D2, V31.S4 // 5f68614e
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//TODO FCVTNS F3, F27 // 7ba8215e
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@ -540,7 +540,7 @@ TEXT asmtest(SB),DUPOK|NOSPLIT,$-8
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//TODO FCVTZU $14, F24, R20 // 14cb191e
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//TODO FCVTZU $6, F25, R17 // 31eb199e
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//TODO FCVTZU $5, F17, R10 // 2aee591e
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//TODO FCVTZU $6, F7, R18 // f2e8599e
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//TODO FCVTZU $6, F7, R19 // f3e8599e
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FCVTZUSW F2, R9 // 4900391e
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FCVTZUS F12, R29 // 9d01399e
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FCVTZUDW F27, R22 // 7603791e
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@ -682,11 +682,11 @@ TEXT asmtest(SB),DUPOK|NOSPLIT,$-8
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VLD1.P (R19)(R4), [V24.B8, V25.B8] // VLD1.P (R19)(R4*1), [V24.B8, V25.B8] // 78a2c40c
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VLD1.P (R20)(R8), [V7.H8, V8.H8, V9.H8] // VLD1.P (R20)(R8*1), [V7.H8, V8.H8, V9.H8] // 8766c84c
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VLD1.P 32(R30), [V5.B8, V6.B8, V7.B8, V8.B8] // c523df0c
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VLD1 (R18), V14.B[15] // 4e1e404d
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VLD1 (R19), V14.B[15] // 6e1e404d
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VLD1 (R29), V0.H[1] // a04b400d
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VLD1 (R27), V2.S[0] // 6283400d
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VLD1 (R21), V5.D[1] // a586404d
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VLD1.P 1(R18), V10.B[14] // 4a1adf4d
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VLD1.P 1(R19), V10.B[14] // 6a1adf4d
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VLD1.P (R3)(R14), V16.B[11] // VLD1.P (R3)(R14*1), V16.B[11] // 700cce4d
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VLD1.P 2(R1), V28.H[2] // 3c50df0d
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VLD1.P (R13)(R20), V9.H[2] // VLD1.P (R13)(R20*1), V9.H[2] // a951d40d
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@ -89,7 +89,7 @@ such as str, stur, strb, sturb, strh, sturh stlr, stlrb. stlrh, st1.
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Examples:
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MOVD R29, 384(R19) <=> str x29, [x19,#384]
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MOVB.P R30, 30(R4) <=> strb w30, [x4],#30
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STLRH R21, (R18) <=> stlrh w21, [x18]
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STLRH R21, (R19) <=> stlrh w21, [x19]
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(2) MADD, MADDW, MSUB, MSUBW, SMADDL, SMSUBL, UMADDL, UMSUBL <Rm>, <Ra>, <Rn>, <Rd>
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@ -127,7 +127,7 @@ such as str, stur, strb, sturb, strh, sturh stlr, stlrb. stlrh, st1.
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Examples:
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CCMN VS, R13, R22, $10 <=> ccmn x13, x22, #0xa, vs
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CCMPW HS, R18, R14, $11 <=> ccmp w18, w14, #0xb, cs
|
||||
CCMPW HS, R19, R14, $11 <=> ccmp w19, w14, #0xb, cs
|
||||
|
||||
(9) CSEL, CSELW, CSNEG, CSNEGW, CSINC, CSINCW <cond>, <Rn>, <Rm>, <Rd> ;
|
||||
FCSELD, FCSELS <cond>, <Fn>, <Fm>, <Fd>
|
||||
|
@ -144,12 +144,12 @@ FCSELD, FCSELS <cond>, <Fn>, <Fm>, <Fd>
|
|||
|
||||
Examples:
|
||||
STLXR ZR, (R15), R16 <=> stlxr w16, xzr, [x15]
|
||||
STXRB R9, (R21), R18 <=> stxrb w18, w9, [x21]
|
||||
STXRB R9, (R21), R19 <=> stxrb w19, w9, [x21]
|
||||
|
||||
(12) STLXP, STLXPW, STXP, STXPW (<Rf1>, <Rf2>), (<Rn|RSP>), <Rs>
|
||||
|
||||
Examples:
|
||||
STLXP (R17, R18), (R4), R5 <=> stlxp w5, x17, x18, [x4]
|
||||
STLXP (R17, R19), (R4), R5 <=> stlxp w5, x17, x19, [x4]
|
||||
STXPW (R30, R25), (R22), R13 <=> stxp w13, w30, w25, [x22]
|
||||
|
||||
2. Expressions for special arguments.
|
||||
|
@ -173,7 +173,7 @@ Extended registers are written as <Rm>{.<extend>{<<<amount>}}.
|
|||
<extend> can be UXTB, UXTH, UXTW, UXTX, SXTB, SXTH, SXTW or SXTX.
|
||||
|
||||
Examples:
|
||||
ADDS R18.UXTB<<4, R9, R26 <=> adds x26, x9, w18, uxtb #4
|
||||
ADDS R19.UXTB<<4, R9, R26 <=> adds x26, x9, w19, uxtb #4
|
||||
ADDSW R14.SXTX, R14, R6 <=> adds w6, w14, w14, sxtx
|
||||
|
||||
Memory references: [<Xn|SP>{,#0}] is written as (Rn|RSP), a base register and an immediate
|
||||
|
|
Loading…
Reference in a new issue