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https://github.com/golang/go
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cmd/compile: PPC64, elide unnecessary sign extension
Inputs to store[BHW] and cmpW(U) need not be correct
in more bits than are used by the instruction.
Added a pattern tailored to what appears to be cgo boilerplate.
Added a pattern (also seen in cgo boilerplate and hashing)
to replace {EQ,NE}-CMP-ANDconst with {EQ-NE}-ANDCCconst.
Added a pattern to clean up ANDconst shift distance inputs
(this was seen in hashing).
Simplify repeated and,or,xor.
Fixes #17109.
Change-Id: I68eac83e3e614d69ffe473a08953048c8b066d88
Reviewed-on: https://go-review.googlesource.com/30455
Run-TryBot: David Chase <drchase@google.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: Keith Randall <khr@golang.org>
This commit is contained in:
David Chase
parent
672e579444
commit
2f0b8f88df
6 changed files with 1192 additions and 60 deletions
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@ -352,6 +352,21 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) {
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p.To.Type = obj.TYPE_REG
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p.To.Reg = v.Reg()
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case ssa.OpPPC64ANDCCconst:
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p := gc.Prog(v.Op.Asm())
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p.Reg = v.Args[0].Reg()
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if v.Aux != nil {
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p.From.Type = obj.TYPE_CONST
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p.From.Offset = gc.AuxOffset(v)
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} else {
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p.From.Type = obj.TYPE_CONST
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p.From.Offset = v.AuxInt
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}
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p.To.Type = obj.TYPE_REG
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p.To.Reg = ppc64.REGTMP // discard result
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case ssa.OpPPC64MOVDaddr:
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p := gc.Prog(ppc64.AMOVD)
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p.From.Type = obj.TYPE_ADDR
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@ -221,6 +221,10 @@
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(Rsh8Ux8 x y) -> (SRW (ZeroExt8to32 x) (ORN y <config.fe.TypeInt64()> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt8to64 y)))))
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(Lsh8x8 x y) -> (SLW x (ORN y <config.fe.TypeInt64()> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt8to64 y)))))
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// Cleaning up shift ops when input is masked
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(MaskIfNotCarry (ADDconstForCarry [c] (ANDconst [d] _))) && c < 0 && d > 0 && c + d < 0 -> (MOVDconst [-1])
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(ORN x (MOVDconst [-1])) -> x
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// Potentially useful optimizing rewrites.
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// (ADDconstForCarry [k] c), k < 0 && (c < 0 || k+c >= 0) -> CarrySet
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// (ADDconstForCarry [k] c), K < 0 && (c >= 0 && k+c < 0) -> CarryClear
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@ -362,6 +366,12 @@
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// (NE (CMPWconst [0] (FGreaterThan cc)) yes no) -> (FGT cc yes no)
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// (NE (CMPWconst [0] (FGreaterEqual cc)) yes no) -> (FGE cc yes no)
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// Elide compares of bit tests // TODO need to make both CC and result of ANDCC available.
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(EQ (CMPconst [0] (ANDconst [c] x)) yes no) -> (EQ (ANDCCconst [c] x) yes no)
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(NE (CMPconst [0] (ANDconst [c] x)) yes no) -> (NE (ANDCCconst [c] x) yes no)
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(EQ (CMPWconst [0] (ANDconst [c] x)) yes no) -> (EQ (ANDCCconst [c] x) yes no)
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(NE (CMPWconst [0] (ANDconst [c] x)) yes no) -> (NE (ANDCCconst [c] x) yes no)
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// absorb flag constants into branches
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(EQ (FlagEQ) yes no) -> (First nil yes no)
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(EQ (FlagLT) yes no) -> (First nil no yes)
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@ -588,20 +598,94 @@
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(NilCheck ptr mem) -> (LoweredNilCheck ptr mem)
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// Optimizations
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// Note that PPC "logical" immediates come in 0:15 and 16:31 unsigned immediate forms,
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// so ORconst, XORconst easily expand into a pair.
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// Include very-large constants in the const-const case.
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(AND (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [c&d])
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(OR (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [c|d])
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(XOR (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [c^d])
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// Discover consts
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(AND x (MOVDconst [c])) && isU16Bit(c) -> (ANDconst [c] x)
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(XOR x (MOVDconst [c])) && isU32Bit(c) -> (XORconst [c] x)
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(OR x (MOVDconst [c])) && isU32Bit(c) -> (ORconst [c] x)
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(AND (MOVDconst [c]) x) && isU16Bit(c) -> (ANDconst [c] x)
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(XOR (MOVDconst [c]) x) && isU32Bit(c) -> (XORconst [c] x)
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(OR (MOVDconst [c]) x) && isU32Bit(c) -> (ORconst [c] x)
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// Simplify consts
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(ANDconst [c] (ANDconst [d] x)) -> (ANDconst [c&d] x)
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(ORconst [c] (ORconst [d] x)) -> (ORconst [c|d] x)
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(XORconst [c] (XORconst [d] x)) -> (XORconst [c^d] x)
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(ANDconst [-1] x) -> x
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(ANDconst [0] _) -> (MOVDconst [0])
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(XORconst [0] x) -> x
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(ORconst [-1] _) -> (MOVDconst [-1])
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(ORconst [0] x) -> x
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// zero-extend of small and -> small and
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(MOVBZreg y:(ANDconst [c] _)) && uint64(c) <= 0xFF -> y
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(MOVHZreg y:(ANDconst [c] _)) && uint64(c) <= 0xFFFF -> y
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(MOVWZreg y:(ANDconst [c] _)) && uint64(c) <= 0xFFFFFFFF -> y
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(MOVWZreg y:(AND (MOVDconst [c]) _)) && uint64(c) <= 0xFFFFFFFF -> y
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// sign extend of small-positive and -> small-positive-and
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(MOVBreg y:(ANDconst [c] _)) && uint64(c) <= 0x7F -> y
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(MOVHreg y:(ANDconst [c] _)) && uint64(c) <= 0x7FFF -> y
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(MOVWreg y:(ANDconst [c] _)) && uint64(c) <= 0xFFFF -> y // 0xFFFF is largest immediate constant, when regarded as 32-bit is > 0
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(MOVWreg y:(AND (MOVDconst [c]) _)) && uint64(c) <= 0x7FFFFFFF -> y
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// small and of zero-extend -> either zero-extend or small and
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// degenerate-and
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(ANDconst [c] y:(MOVBZreg _)) && c&0xFF == 0xFF -> y
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(ANDconst [c] y:(MOVHZreg _)) && c&0xFFFF == 0xFFFF -> y
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(ANDconst [c] y:(MOVWZreg _)) && c&0xFFFFFFFF == 0xFFFFFFFF -> y
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// normal case
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(ANDconst [c] (MOVBZreg x)) -> (ANDconst [c&0xFF] x)
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(ANDconst [c] (MOVHZreg x)) -> (ANDconst [c&0xFFFF] x)
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(ANDconst [c] (MOVWZreg x)) -> (ANDconst [c&0xFFFFFFFF] x)
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// Various redundant zero/sign extension combinations.
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(MOVBZreg y:(MOVBZreg _)) -> y // repeat
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(MOVBreg y:(MOVBreg _)) -> y // repeat
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(MOVBreg (MOVBZreg x)) -> (MOVBreg x)
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(MOVBZreg (MOVBreg x)) -> (MOVBZreg x)
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// H - there are more combinations than these
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(MOVHZreg y:(MOVHZreg _)) -> y // repeat
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(MOVHZreg y:(MOVBZreg _)) -> y // wide of narrow
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(MOVHreg y:(MOVHreg _)) -> y // repeat
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(MOVHreg y:(MOVBreg _)) -> y // wide of narrow
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(MOVHreg y:(MOVHZreg x)) -> (MOVHreg x)
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(MOVHZreg y:(MOVHreg x)) -> (MOVHZreg x)
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// W - there are more combinations than these
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(MOVWZreg y:(MOVWZreg _)) -> y // repeat
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(MOVWZreg y:(MOVHZreg _)) -> y // wide of narrow
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(MOVWZreg y:(MOVBZreg _)) -> y // wide of narrow
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(MOVWreg y:(MOVWreg _)) -> y // repeat
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(MOVWreg y:(MOVHreg _)) -> y // wide of narrow
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(MOVWreg y:(MOVBreg _)) -> y // wide of narrow
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(MOVWreg y:(MOVWZreg x)) -> (MOVWreg x)
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(MOVWZreg y:(MOVWreg x)) -> (MOVWZreg x)
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// Arithmetic constant ops
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(ADD (MOVDconst [c]) x) && is32Bit(c) -> (ADDconst [c] x)
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(ADD x (MOVDconst [c])) && is32Bit(c) -> (ADDconst [c] x)
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(ADDconst [c] (ADDconst [d] x)) && is32Bit(c+d) -> (ADDconst [c+d] x)
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(ADDconst [c] (MOVDaddr [d] {sym} x)) -> (MOVDaddr [c+d] {sym} x)
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(ADDconst [0] x) -> x
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(ANDconst [-1] x) -> x
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(ANDconst [0] _) -> (MOVDconst [0])
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(XORconst [0] x) -> x
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(SUB x (MOVDconst [c])) && is32Bit(-c) -> (ADDconst [-c] x)
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// TODO deal with subtract-from-const
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(XOR (MOVDconst [0]) x) -> x
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(XOR x (MOVDconst [0])) -> x
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(ADD (MOVDconst [0]) x) -> x
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(ADD x (MOVDconst [0])) -> x
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(ADDconst [c] (MOVDaddr [d] {sym} x)) -> (MOVDaddr [c+d] {sym} x)
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// Fold offsets for stores.
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(MOVDstore [off1] {sym} (ADDconst [off2] x) val mem) && is16Bit(off1+off2) -> (MOVDstore [off1+off2] {sym} x val mem)
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@ -714,10 +798,19 @@
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(MOVHZreg (MOVDconst [c])) -> (MOVDconst [int64(uint16(c))])
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(MOVHreg (MOVDconst [c])) -> (MOVDconst [int64(int16(c))])
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// Lose widening ops fed to to stores
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(MOVBstore [off] {sym} ptr (MOVBreg x) mem) -> (MOVBstore [off] {sym} ptr x mem)
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(MOVBstore [off] {sym} ptr (MOVBZreg x) mem) -> (MOVBstore [off] {sym} ptr x mem)
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(MOVHstore [off] {sym} ptr (MOVHreg x) mem) -> (MOVHstore [off] {sym} ptr x mem)
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(MOVHstore [off] {sym} ptr (MOVHZreg x) mem) -> (MOVHstore [off] {sym} ptr x mem)
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(MOVWstore [off] {sym} ptr (MOVWreg x) mem) -> (MOVWstore [off] {sym} ptr x mem)
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(MOVWstore [off] {sym} ptr (MOVWZreg x) mem) -> (MOVWstore [off] {sym} ptr x mem)
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// Lose W-widening ops fed to compare-W
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(CMPW x (MOVWreg y)) -> (CMPW x y)
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(CMPW (MOVWreg x) y) -> (CMPW x y)
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(CMPWU x (MOVWZreg y)) -> (CMPWU x y)
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(CMPWU (MOVWZreg x) y) -> (CMPWU x y)
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(CMP x (MOVDconst [c])) && is16Bit(c) -> (CMPconst x [c])
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(CMP (MOVDconst [c]) y) && is16Bit(c) -> (InvertFlags (CMPconst y [c]))
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@ -728,3 +821,7 @@
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(CMPU (MOVDconst [c]) y) && isU16Bit(c) -> (InvertFlags (CMPUconst y [c]))
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(CMPWU x (MOVDconst [c])) && isU16Bit(c) -> (CMPWUconst x [c])
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(CMPWU (MOVDconst [c]) y) && isU16Bit(c) -> (InvertFlags (CMPWUconst y [c]))
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// A particular pattern seen in cgo code:
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(AND (MOVDconst [c]) x:(MOVBZload _ _)) -> (ANDconst [c&0xFF] x)
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(AND x:(MOVBZload _ _) (MOVDconst [c])) -> (ANDconst [c&0xFF] x)
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@ -226,6 +226,7 @@ func init() {
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{name: "ORconst", argLength: 1, reg: gp11, asm: "OR", aux: "Int64"}, // arg0|aux
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{name: "XORconst", argLength: 1, reg: gp11, asm: "XOR", aux: "Int64"}, // arg0^aux
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{name: "ANDconst", argLength: 1, reg: regInfo{inputs: []regMask{gp | sp | sb}, outputs: []regMask{gp}}, asm: "ANDCC", aux: "Int64", clobberFlags: true}, // arg0&aux // and-immediate sets CC on PPC, always.
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{name: "ANDCCconst", argLength: 1, reg: regInfo{inputs: []regMask{gp | sp | sb}}, asm: "ANDCC", aux: "Int64", typ: "Flags"}, // arg0&aux == 0 // and-immediate sets CC on PPC, always.
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{name: "MOVBreg", argLength: 1, reg: gp11, asm: "MOVB", typ: "Int64"}, // sign extend int8 to int64
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{name: "MOVBZreg", argLength: 1, reg: gp11, asm: "MOVBZ", typ: "Int64"}, // zero extend uint8 to uint64
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@ -256,9 +257,9 @@ func init() {
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{name: "MOVDaddr", argLength: 1, reg: regInfo{inputs: []regMask{sp | sb}, outputs: []regMask{gp}}, aux: "SymOff", asm: "MOVD", rematerializeable: true}, // arg0 + auxInt + aux.(*gc.Sym), arg0=SP/SB
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{name: "MOVDconst", argLength: 0, reg: gp01, aux: "Int64", asm: "MOVD", rematerializeable: true}, //
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{name: "FMOVDconst", argLength: 0, reg: fp01, aux: "Float64", asm: "FMOVD", rematerializeable: true}, //
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{name: "FMOVSconst", argLength: 0, reg: fp01, aux: "Float32", asm: "FMOVS", rematerializeable: true}, //
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{name: "MOVDconst", argLength: 0, reg: gp01, aux: "Int64", asm: "MOVD", typ: "Int64", rematerializeable: true}, //
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{name: "FMOVDconst", argLength: 0, reg: fp01, aux: "Float64", asm: "FMOVD", rematerializeable: true}, //
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{name: "FMOVSconst", argLength: 0, reg: fp01, aux: "Float32", asm: "FMOVS", rematerializeable: true}, //
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{name: "FCMPU", argLength: 2, reg: fp2cr, asm: "FCMPU", typ: "Flags"},
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{name: "CMP", argLength: 2, reg: gp2cr, asm: "CMP", typ: "Flags"}, // arg0 compare to arg1
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@ -1176,6 +1176,7 @@ const (
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OpPPC64ORconst
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OpPPC64XORconst
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OpPPC64ANDconst
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OpPPC64ANDCCconst
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OpPPC64MOVBreg
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OpPPC64MOVBZreg
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OpPPC64MOVHreg
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@ -14652,6 +14653,17 @@ var opcodeTable = [...]opInfo{
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},
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},
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},
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{
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name: "ANDCCconst",
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auxType: auxInt64,
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argLen: 1,
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asm: ppc64.AANDCC,
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reg: regInfo{
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inputs: []inputInfo{
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{0, 1073733630}, // SP SB R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R14 R15 R16 R17 R18 R19 R20 R21 R22 R23 R24 R25 R26 R27 R28 R29
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},
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},
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},
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{
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name: "MOVBreg",
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argLen: 1,
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@ -229,11 +229,16 @@ func is16Bit(n int64) bool {
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return n == int64(int16(n))
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}
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// is16Bit reports whether n can be represented as an unsigned 16 bit integer.
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// isU16Bit reports whether n can be represented as an unsigned 16 bit integer.
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func isU16Bit(n int64) bool {
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return n == int64(uint16(n))
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}
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// isU32Bit reports whether n can be represented as an unsigned 32 bit integer.
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func isU32Bit(n int64) bool {
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return n == int64(uint32(n))
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}
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// is20Bit reports whether n can be represented as a signed 20 bit integer.
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func is20Bit(n int64) bool {
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return -(1<<19) <= n && n < (1<<19)
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