From 2e4f490b31272a2df73d4ba23aad7f5a8ca49a2f Mon Sep 17 00:00:00 2001 From: Joel Sing Date: Wed, 29 Jan 2020 20:06:54 +1100 Subject: [PATCH] cmd/compile,cmd/link: fix and re-enable open-coded defers on riscv64 The R_CALLRISCV relocation marker is on the JALR instruction, however the actual relocation is currently two instructions previous for the AUIPC+ADDI sequence. Adjust the platform dependent offset accordingly and re-enable open-coded defers. Fixes #36786. Change-Id: I71597c193c447930fbe94ce44b7355e89ae877bb Reviewed-on: https://go-review.googlesource.com/c/go/+/216797 Run-TryBot: Joel Sing TryBot-Result: Gobot Gobot Reviewed-by: Cherry Zhang --- src/cmd/compile/internal/gc/ssa.go | 4 ---- src/cmd/link/internal/ld/pcln.go | 7 ++++++- test/live.go | 6 +----- 3 files changed, 7 insertions(+), 10 deletions(-) diff --git a/src/cmd/compile/internal/gc/ssa.go b/src/cmd/compile/internal/gc/ssa.go index 24cb200175..b8e99f08c5 100644 --- a/src/cmd/compile/internal/gc/ssa.go +++ b/src/cmd/compile/internal/gc/ssa.go @@ -347,10 +347,6 @@ func buildssa(fn *Node, worker int) *ssa.Func { // preceding the deferreturn/ret code that is generated by gencallret() // that we don't track correctly. s.hasOpenDefers = false - case thearch.LinkArch.Name == "riscv64": - // The use of open-coded defers is currently broken on riscv64, - // hence disable it for now - see issue golang.org/issue/36786 - s.hasOpenDefers = false } if s.hasOpenDefers && s.curfn.Func.Exit.Len() > 0 { // Skip doing open defers if there is any extra exit code (likely diff --git a/src/cmd/link/internal/ld/pcln.go b/src/cmd/link/internal/ld/pcln.go index ab703e94ee..7cba9bde6d 100644 --- a/src/cmd/link/internal/ld/pcln.go +++ b/src/cmd/link/internal/ld/pcln.go @@ -266,8 +266,13 @@ func (ctxt *Link) pclntab() { switch ctxt.Arch.Family { case sys.AMD64, sys.I386: deferreturn-- - case sys.PPC64, sys.ARM, sys.ARM64, sys.MIPS, sys.MIPS64, sys.RISCV64: + case sys.PPC64, sys.ARM, sys.ARM64, sys.MIPS, sys.MIPS64: // no change + case sys.RISCV64: + // TODO(jsing): The JALR instruction is marked with + // R_CALLRISCV, whereas the actual reloc is currently + // two instructions earlier for the AUIPC+AADI sequence. + deferreturn -= 8 case sys.S390X: deferreturn -= 2 default: diff --git a/test/live.go b/test/live.go index 02e0fd51e5..3df7ab01af 100644 --- a/test/live.go +++ b/test/live.go @@ -1,13 +1,9 @@ // errorcheckwithauto -0 -l -live -wb=0 -d=ssa/insert_resched_checks/off -// +build !ppc64,!ppc64le,!riscv64 +// +build !ppc64,!ppc64le // ppc64 needs a better tighten pass to make f18 pass // rescheduling checks need to be turned off because there are some live variables across the inserted check call -// TODO(jsing): these tests assume that open-coded defers are enabled, -// which is not currently the case on riscv64. Re-enable this test once -// open-coded defers are available - golang.org/issues/36786. - // Copyright 2014 The Go Authors. All rights reserved. // Use of this source code is governed by a BSD-style // license that can be found in the LICENSE file.