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df64bb1619
- Remove disassembly tooltips. - Surface whether a function has an intrinsic or is recognized. - Mark intrinsified or ffi functions in the profile. R=johnmccutchan@google.com Review URL: https://codereview.chromium.org/1439893002 .
375 lines
13 KiB
C++
375 lines
13 KiB
C++
// Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
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// for details. All rights reserved. Use of this source code is governed by a
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// BSD-style license that can be found in the LICENSE file.
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#include "vm/globals.h" // Needed here to get TARGET_ARCH_ARM.
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#if defined(TARGET_ARCH_ARM)
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#include "vm/assembler.h"
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#include "vm/constants_arm.h"
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#include "vm/cpu.h"
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#include "vm/instructions.h"
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#include "vm/object.h"
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namespace dart {
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CallPattern::CallPattern(uword pc, const Code& code)
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: object_pool_(ObjectPool::Handle(code.GetObjectPool())),
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end_(pc),
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ic_data_load_end_(0),
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target_code_pool_index_(-1),
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ic_data_(ICData::Handle()) {
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ASSERT(code.ContainsInstructionAt(pc));
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// Last instruction: blx lr.
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ASSERT(*(reinterpret_cast<uword*>(end_) - 1) == 0xe12fff3e);
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Register reg;
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ic_data_load_end_ =
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InstructionPattern::DecodeLoadWordFromPool(end_ - 2 * Instr::kInstrSize,
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®,
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&target_code_pool_index_);
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ASSERT(reg == CODE_REG);
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}
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int CallPattern::DeoptCallPatternLengthInInstructions() {
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const ARMVersion version = TargetCPUFeatures::arm_version();
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if ((version == ARMv5TE) || (version == ARMv6)) {
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return 5;
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} else {
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ASSERT(version == ARMv7);
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return 3;
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}
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}
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int CallPattern::DeoptCallPatternLengthInBytes() {
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return DeoptCallPatternLengthInInstructions() * Instr::kInstrSize;
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}
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NativeCallPattern::NativeCallPattern(uword pc, const Code& code)
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: object_pool_(ObjectPool::Handle(code.GetObjectPool())),
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end_(pc),
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native_function_pool_index_(-1),
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target_code_pool_index_(-1) {
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ASSERT(code.ContainsInstructionAt(pc));
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// Last instruction: blx lr.
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ASSERT(*(reinterpret_cast<uword*>(end_) - 1) == 0xe12fff3e);
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Register reg;
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uword native_function_load_end =
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InstructionPattern::DecodeLoadWordFromPool(end_ - 2 * Instr::kInstrSize,
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®,
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&target_code_pool_index_);
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ASSERT(reg == CODE_REG);
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InstructionPattern::DecodeLoadWordFromPool(native_function_load_end,
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®,
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&native_function_pool_index_);
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ASSERT(reg == R9);
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}
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RawCode* NativeCallPattern::target() const {
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return reinterpret_cast<RawCode*>(
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object_pool_.ObjectAt(target_code_pool_index_));
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}
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void NativeCallPattern::set_target(const Code& new_target) const {
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object_pool_.SetObjectAt(target_code_pool_index_, new_target);
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// No need to flush the instruction cache, since the code is not modified.
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}
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NativeFunction NativeCallPattern::native_function() const {
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return reinterpret_cast<NativeFunction>(
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object_pool_.RawValueAt(native_function_pool_index_));
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}
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void NativeCallPattern::set_native_function(NativeFunction func) const {
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object_pool_.SetRawValueAt(native_function_pool_index_,
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reinterpret_cast<uword>(func));
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}
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// Decodes a load sequence ending at 'end' (the last instruction of the load
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// sequence is the instruction before the one at end). Returns a pointer to
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// the first instruction in the sequence. Returns the register being loaded
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// and the loaded object in the output parameters 'reg' and 'obj'
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// respectively.
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uword InstructionPattern::DecodeLoadObject(uword end,
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const ObjectPool& object_pool,
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Register* reg,
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Object* obj) {
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uword start = 0;
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Instr* instr = Instr::At(end - Instr::kInstrSize);
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if ((instr->InstructionBits() & 0xfff00000) == 0xe5900000) {
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// ldr reg, [reg, #+offset]
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intptr_t index = 0;
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start = DecodeLoadWordFromPool(end, reg, &index);
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*obj = object_pool.ObjectAt(index);
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} else {
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intptr_t value = 0;
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start = DecodeLoadWordImmediate(end, reg, &value);
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*obj = reinterpret_cast<RawObject*>(value);
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}
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return start;
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}
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// Decodes a load sequence ending at 'end' (the last instruction of the load
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// sequence is the instruction before the one at end). Returns a pointer to
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// the first instruction in the sequence. Returns the register being loaded
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// and the loaded immediate value in the output parameters 'reg' and 'value'
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// respectively.
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uword InstructionPattern::DecodeLoadWordImmediate(uword end,
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Register* reg,
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intptr_t* value) {
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uword start = end - Instr::kInstrSize;
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int32_t instr = Instr::At(start)->InstructionBits();
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intptr_t imm = 0;
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const ARMVersion version = TargetCPUFeatures::arm_version();
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if ((version == ARMv5TE) || (version == ARMv6)) {
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ASSERT((instr & 0xfff00000) == 0xe3800000); // orr rd, rd, byte0
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imm |= (instr & 0x000000ff);
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start -= Instr::kInstrSize;
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instr = Instr::At(start)->InstructionBits();
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ASSERT((instr & 0xfff00000) == 0xe3800c00); // orr rd, rd, (byte1 rot 12)
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imm |= (instr & 0x000000ff);
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start -= Instr::kInstrSize;
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instr = Instr::At(start)->InstructionBits();
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ASSERT((instr & 0xfff00f00) == 0xe3800800); // orr rd, rd, (byte2 rot 8)
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imm |= (instr & 0x000000ff);
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start -= Instr::kInstrSize;
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instr = Instr::At(start)->InstructionBits();
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ASSERT((instr & 0xffff0f00) == 0xe3a00400); // mov rd, (byte3 rot 4)
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imm |= (instr & 0x000000ff);
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*reg = static_cast<Register>((instr & 0x0000f000) >> 12);
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*value = imm;
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} else {
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ASSERT(version == ARMv7);
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if ((instr & 0xfff00000) == 0xe3400000) { // movt reg, #imm_hi
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imm |= (instr & 0xf0000) << 12;
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imm |= (instr & 0xfff) << 16;
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start -= Instr::kInstrSize;
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instr = Instr::At(start)->InstructionBits();
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}
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ASSERT((instr & 0xfff00000) == 0xe3000000); // movw reg, #imm_lo
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imm |= (instr & 0xf0000) >> 4;
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imm |= instr & 0xfff;
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*reg = static_cast<Register>((instr & 0xf000) >> 12);
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*value = imm;
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}
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return start;
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}
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static bool IsLoadWithOffset(int32_t instr, Register base,
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intptr_t* offset, Register* dst) {
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if ((instr & 0xffff0000) == (0xe5900000 | (base << 16))) {
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// ldr reg, [base, #+offset]
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*offset = instr & 0xfff;
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*dst = static_cast<Register>((instr & 0xf000) >> 12);
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return true;
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}
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return false;
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}
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// Decodes a load sequence ending at 'end' (the last instruction of the load
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// sequence is the instruction before the one at end). Returns a pointer to
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// the first instruction in the sequence. Returns the register being loaded
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// and the index in the pool being read from in the output parameters 'reg'
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// and 'index' respectively.
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uword InstructionPattern::DecodeLoadWordFromPool(uword end,
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Register* reg,
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intptr_t* index) {
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uword start = end - Instr::kInstrSize;
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int32_t instr = Instr::At(start)->InstructionBits();
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intptr_t offset = 0;
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if (IsLoadWithOffset(instr, PP, &offset, reg)) {
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// ldr reg, [PP, #+offset]
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} else {
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ASSERT((instr & 0xfff00000) == 0xe5900000); // ldr reg, [reg, #+offset]
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offset = instr & 0xfff;
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start -= Instr::kInstrSize;
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instr = Instr::At(start)->InstructionBits();
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if ((instr & 0xffff0000) == (0xe2850000 | (PP << 16))) {
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// add reg, pp, operand
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const intptr_t rot = (instr & 0xf00) >> 7;
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const intptr_t imm8 = instr & 0xff;
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offset += (imm8 >> rot) | (imm8 << (32 - rot));
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*reg = static_cast<Register>((instr & 0xf000) >> 12);
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} else {
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ASSERT((instr & 0xffff0000) == (0xe0800000 | (PP << 16)));
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// add reg, pp, reg
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end = DecodeLoadWordImmediate(end, reg, &offset);
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}
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}
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*index = ObjectPool::IndexFromOffset(offset);
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return start;
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}
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bool DecodeLoadObjectFromPoolOrThread(uword pc,
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const Code& code,
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Object* obj) {
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ASSERT(code.ContainsInstructionAt(pc));
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int32_t instr = Instr::At(pc)->InstructionBits();
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intptr_t offset;
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Register dst;
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if (IsLoadWithOffset(instr, PP, &offset, &dst)) {
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intptr_t index = ObjectPool::IndexFromOffset(offset);
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const ObjectPool& pool = ObjectPool::Handle(code.object_pool());
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if (pool.InfoAt(index) == ObjectPool::kTaggedObject) {
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*obj = pool.ObjectAt(index);
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return true;
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}
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} else if (IsLoadWithOffset(instr, THR, &offset, &dst)) {
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return Thread::ObjectAtOffset(offset, obj);
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}
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// TODO(rmacnak): Sequence for loads beyond 12 bits.
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return false;
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}
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RawICData* CallPattern::IcData() {
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if (ic_data_.IsNull()) {
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Register reg;
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InstructionPattern::DecodeLoadObject(ic_data_load_end_,
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object_pool_,
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®,
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&ic_data_);
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ASSERT(reg == R9);
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}
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return ic_data_.raw();
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}
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RawCode* CallPattern::TargetCode() const {
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return reinterpret_cast<RawCode*>(
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object_pool_.ObjectAt(target_code_pool_index_));
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}
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void CallPattern::SetTargetCode(const Code& target_code) const {
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object_pool_.SetObjectAt(target_code_pool_index_, target_code);
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}
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void CallPattern::InsertDeoptCallAt(uword pc, uword target_address) {
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const ARMVersion version = TargetCPUFeatures::arm_version();
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if ((version == ARMv5TE) || (version == ARMv6)) {
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const uint32_t byte0 = (target_address & 0x000000ff);
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const uint32_t byte1 = (target_address & 0x0000ff00) >> 8;
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const uint32_t byte2 = (target_address & 0x00ff0000) >> 16;
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const uint32_t byte3 = (target_address & 0xff000000) >> 24;
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const uword mov_ip = 0xe3a0c400 | byte3; // mov ip, (byte3 rot 4)
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const uword or1_ip = 0xe38cc800 | byte2; // orr ip, ip, (byte2 rot 8)
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const uword or2_ip = 0xe38ccc00 | byte1; // orr ip, ip, (byte1 rot 12)
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const uword or3_ip = 0xe38cc000 | byte0; // orr ip, ip, byte0
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const uword blx_ip = 0xe12fff3c;
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*reinterpret_cast<uword*>(pc + (0 * Instr::kInstrSize)) = mov_ip;
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*reinterpret_cast<uword*>(pc + (1 * Instr::kInstrSize)) = or1_ip;
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*reinterpret_cast<uword*>(pc + (2 * Instr::kInstrSize)) = or2_ip;
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*reinterpret_cast<uword*>(pc + (3 * Instr::kInstrSize)) = or3_ip;
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*reinterpret_cast<uword*>(pc + (4 * Instr::kInstrSize)) = blx_ip;
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ASSERT(DeoptCallPatternLengthInBytes() == 5 * Instr::kInstrSize);
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CPU::FlushICache(pc, DeoptCallPatternLengthInBytes());
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} else {
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ASSERT(version == ARMv7);
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const uint16_t target_lo = target_address & 0xffff;
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const uint16_t target_hi = target_address >> 16;
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const uword movw_ip =
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0xe300c000 | ((target_lo >> 12) << 16) | (target_lo & 0xfff);
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const uword movt_ip =
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0xe340c000 | ((target_hi >> 12) << 16) | (target_hi & 0xfff);
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const uword blx_ip = 0xe12fff3c;
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*reinterpret_cast<uword*>(pc + (0 * Instr::kInstrSize)) = movw_ip;
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*reinterpret_cast<uword*>(pc + (1 * Instr::kInstrSize)) = movt_ip;
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*reinterpret_cast<uword*>(pc + (2 * Instr::kInstrSize)) = blx_ip;
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ASSERT(DeoptCallPatternLengthInBytes() == 3 * Instr::kInstrSize);
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CPU::FlushICache(pc, DeoptCallPatternLengthInBytes());
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}
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}
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SwitchableCallPattern::SwitchableCallPattern(uword pc, const Code& code)
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: object_pool_(ObjectPool::Handle(code.GetObjectPool())),
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cache_pool_index_(-1),
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stub_pool_index_(-1) {
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ASSERT(code.ContainsInstructionAt(pc));
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// Last instruction: blx r1.
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ASSERT(*(reinterpret_cast<uword*>(pc) - 1) == 0xe12fff31);
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Register reg;
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uword stub_load_end =
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InstructionPattern::DecodeLoadWordFromPool(pc - 3 * Instr::kInstrSize,
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®,
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&stub_pool_index_);
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ASSERT(reg == CODE_REG);
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InstructionPattern::DecodeLoadWordFromPool(stub_load_end,
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®,
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&cache_pool_index_);
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ASSERT(reg == R9);
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}
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RawObject* SwitchableCallPattern::cache() const {
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return reinterpret_cast<RawCode*>(
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object_pool_.ObjectAt(cache_pool_index_));
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}
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void SwitchableCallPattern::SetCache(const MegamorphicCache& cache) const {
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ASSERT(Object::Handle(object_pool_.ObjectAt(cache_pool_index_)).IsICData());
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object_pool_.SetObjectAt(cache_pool_index_, cache);
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}
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void SwitchableCallPattern::SetLookupStub(const Code& lookup_stub) const {
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ASSERT(Object::Handle(object_pool_.ObjectAt(stub_pool_index_)).IsCode());
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object_pool_.SetObjectAt(stub_pool_index_, lookup_stub);
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}
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ReturnPattern::ReturnPattern(uword pc)
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: pc_(pc) {
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}
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bool ReturnPattern::IsValid() const {
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Instr* bx_lr = Instr::At(pc_);
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const int32_t B4 = 1 << 4;
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const int32_t B21 = 1 << 21;
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const int32_t B24 = 1 << 24;
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int32_t instruction = (static_cast<int32_t>(AL) << kConditionShift) |
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B24 | B21 | (0xfff << 8) | B4 |
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(static_cast<int32_t>(LR) << kRmShift);
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const ARMVersion version = TargetCPUFeatures::arm_version();
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if ((version == ARMv5TE) || (version == ARMv6)) {
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return bx_lr->InstructionBits() == instruction;
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} else {
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ASSERT(version == ARMv7);
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return bx_lr->InstructionBits() == instruction;
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}
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return false;
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}
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} // namespace dart
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#endif // defined TARGET_ARCH_ARM
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