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![Daco Harkes](/assets/img/avatar_default.png)
Issue: https://github.com/dart-lang/sdk/issues/35773 Change-Id: Ib58fb8df6c5c18e604fbf2a156ab69025e5f57d7 Cq-Include-Trybots: luci.dart.try:vm-kernel-linux-debug-simdbc64-try, vm-kernel-linux-release-simdbc64-try, vm-kernel-mac-debug-simdbc64-try, vm-kernel-mac-release-simdbc64-try, vm-kernel-reload-mac-debug-simdbc64-try, vm-kernel-reload-mac-release-simdbc64-try, vm-kernel-linux-debug-ia32-try, vm-dartkb-linux-debug-simarm64-try Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/97221 Reviewed-by: Samir Jindel <sjindel@google.com> Commit-Queue: Daco Harkes <dacoharkes@google.com>
310 lines
9.5 KiB
C++
310 lines
9.5 KiB
C++
// Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
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// for details. All rights reserved. Use of this source code is governed by a
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// BSD-style license that can be found in the LICENSE file.
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#ifndef RUNTIME_VM_CONSTANTS_X64_H_
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#define RUNTIME_VM_CONSTANTS_X64_H_
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#ifndef RUNTIME_VM_CONSTANTS_H_
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#error Do not include constants_x64.h directly; use constants.h instead.
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#endif
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#include "platform/assert.h"
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#include "platform/globals.h"
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namespace arch_x64 {
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enum Register {
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RAX = 0,
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RCX = 1,
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RDX = 2,
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RBX = 3,
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RSP = 4,
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RBP = 5,
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RSI = 6,
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RDI = 7,
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R8 = 8,
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R9 = 9,
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R10 = 10,
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R11 = 11,
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R12 = 12,
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R13 = 13,
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R14 = 14,
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R15 = 15,
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kNumberOfCpuRegisters = 16,
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kNoRegister = -1, // Signals an illegal register.
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};
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enum ByteRegister {
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AL = 0,
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CL = 1,
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DL = 2,
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BL = 3,
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AH = 4,
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CH = 5,
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DH = 6,
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BH = 7,
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SPL = 4 | 0x10,
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BPL = 5 | 0x10,
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SIL = 6 | 0x10,
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DIL = 7 | 0x10,
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R8B = 8,
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R9B = 9,
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R10B = 10,
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R11B = 11,
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R12B = 12,
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R13B = 13,
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R14B = 14,
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R15B = 15,
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kNoByteRegister = -1 // Signals an illegal register.
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};
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inline ByteRegister ByteRegisterOf(Register reg) {
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if (RSP <= reg && reg <= RDI) {
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return static_cast<ByteRegister>(reg | 0x10);
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} else {
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return static_cast<ByteRegister>(reg);
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}
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}
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enum XmmRegister {
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XMM0 = 0,
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XMM1 = 1,
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XMM2 = 2,
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XMM3 = 3,
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XMM4 = 4,
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XMM5 = 5,
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XMM6 = 6,
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XMM7 = 7,
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XMM8 = 8,
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XMM9 = 9,
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XMM10 = 10,
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XMM11 = 11,
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XMM12 = 12,
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XMM13 = 13,
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XMM14 = 14,
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XMM15 = 15,
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kNumberOfXmmRegisters = 16,
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kNoXmmRegister = -1 // Signals an illegal register.
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};
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// Architecture independent aliases.
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typedef XmmRegister FpuRegister;
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const FpuRegister FpuTMP = XMM15;
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const int kNumberOfFpuRegisters = kNumberOfXmmRegisters;
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const FpuRegister kNoFpuRegister = kNoXmmRegister;
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extern const char* cpu_reg_names[kNumberOfCpuRegisters];
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extern const char* fpu_reg_names[kNumberOfXmmRegisters];
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enum RexBits {
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REX_NONE = 0,
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REX_B = 1 << 0,
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REX_X = 1 << 1,
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REX_R = 1 << 2,
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REX_W = 1 << 3,
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REX_PREFIX = 1 << 6
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};
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// Register aliases.
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const Register TMP = R11; // Used as scratch register by the assembler.
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const Register TMP2 = kNoRegister; // No second assembler scratch register.
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// Caches object pool pointer in generated code.
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const Register PP = R15;
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const Register SPREG = RSP; // Stack pointer register.
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const Register FPREG = RBP; // Frame pointer register.
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const Register ARGS_DESC_REG = R10; // Arguments descriptor register.
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const Register CODE_REG = R12;
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const Register THR = R14; // Caches current thread in generated code.
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const Register CALLEE_SAVED_TEMP = RBX;
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// ABI for catch-clause entry point.
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const Register kExceptionObjectReg = RAX;
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const Register kStackTraceObjectReg = RDX;
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// ABI for write barrier stub.
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const Register kWriteBarrierObjectReg = RDX;
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const Register kWriteBarrierValueReg = RAX;
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const Register kWriteBarrierSlotReg = R13;
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typedef uint32_t RegList;
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const RegList kAllCpuRegistersList = 0xFFFF;
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const RegList kAllFpuRegistersList = 0xFFFF;
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const RegList kReservedCpuRegisters =
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(1 << SPREG) | (1 << FPREG) | (1 << TMP) | (1 << PP) | (1 << THR);
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constexpr intptr_t kNumberOfReservedCpuRegisters = 5;
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// CPU registers available to Dart allocator.
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const RegList kDartAvailableCpuRegs =
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kAllCpuRegistersList & ~kReservedCpuRegisters;
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constexpr int kNumberOfDartAvailableCpuRegs =
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kNumberOfCpuRegisters - kNumberOfReservedCpuRegisters;
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constexpr int kStoreBufferWrapperSize = 13;
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enum ScaleFactor {
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TIMES_1 = 0,
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TIMES_2 = 1,
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TIMES_4 = 2,
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TIMES_8 = 3,
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TIMES_16 = 4,
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TIMES_HALF_WORD_SIZE = ::dart::kWordSizeLog2 - 1
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};
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#define R(reg) (1 << (reg))
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class CallingConventions {
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public:
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#if defined(_WIN64)
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static const Register kArg1Reg = RCX;
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static const Register kArg2Reg = RDX;
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static const Register kArg3Reg = R8;
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static const Register kArg4Reg = R9;
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static const Register ArgumentRegisters[];
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static const intptr_t kArgumentRegisters =
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R(kArg1Reg) | R(kArg2Reg) | R(kArg3Reg) | R(kArg4Reg);
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static const intptr_t kNumArgRegs = 4;
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static const XmmRegister FpuArgumentRegisters[];
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static const intptr_t kFpuArgumentRegisters =
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R(XMM0) | R(XMM1) | R(XMM2) | R(XMM3);
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static const intptr_t kNumFpuArgRegs = 4;
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// can ArgumentRegisters[i] and XmmArgumentRegisters[i] both be used at the
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// same time? (Windows no, rest yes)
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static const bool kArgumentIntRegXorFpuReg = true;
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static const intptr_t kShadowSpaceBytes = 4 * ::dart::kWordSize;
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static const intptr_t kVolatileCpuRegisters =
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R(RAX) | R(RCX) | R(RDX) | R(R8) | R(R9) | R(R10) | R(R11);
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static const intptr_t kVolatileXmmRegisters =
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R(XMM0) | R(XMM1) | R(XMM2) | R(XMM3) | R(XMM4) | R(XMM5);
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static const intptr_t kCalleeSaveCpuRegisters =
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R(RBX) | R(RSI) | R(RDI) | R(R12) | R(R13) | R(R14) | R(R15);
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static const intptr_t kCalleeSaveXmmRegisters =
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R(XMM6) | R(XMM7) | R(XMM8) | R(XMM9) | R(XMM10) | R(XMM11) | R(XMM12) |
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R(XMM13) | R(XMM14) | R(XMM15);
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static const XmmRegister xmmFirstNonParameterReg = XMM4;
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// Windows x64 ABI specifies that small objects are passed in registers.
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// Otherwise they are passed by reference.
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static const size_t kRegisterTransferLimit = 16;
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static constexpr Register kReturnReg = RAX;
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static constexpr Register kSecondReturnReg = kNoRegister;
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static constexpr FpuRegister kReturnFpuReg = XMM0;
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// Whether floating-point values should be passed as integers ("softfp" vs
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// "hardfp").
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static constexpr bool kAbiSoftFP = false;
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// Whether 64-bit arguments must be aligned to an even register or 8-byte
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// stack address. Not relevant on X64 since the word size is 64-bits already.
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static constexpr bool kAlignArguments = false;
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#else
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static const Register kArg1Reg = RDI;
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static const Register kArg2Reg = RSI;
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static const Register kArg3Reg = RDX;
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static const Register kArg4Reg = RCX;
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static const Register kArg5Reg = R8;
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static const Register kArg6Reg = R9;
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static const Register ArgumentRegisters[];
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static const intptr_t kArgumentRegisters = R(kArg1Reg) | R(kArg2Reg) |
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R(kArg3Reg) | R(kArg4Reg) |
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R(kArg5Reg) | R(kArg6Reg);
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static const intptr_t kNumArgRegs = 6;
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static const XmmRegister FpuArgumentRegisters[];
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static const intptr_t kFpuArgumentRegisters = R(XMM0) | R(XMM1) | R(XMM2) |
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R(XMM3) | R(XMM4) | R(XMM5) |
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R(XMM6) | R(XMM7);
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static const intptr_t kNumFpuArgRegs = 8;
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// can ArgumentRegisters[i] and XmmArgumentRegisters[i] both be used at the
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// same time? (Windows no, rest yes)
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static const bool kArgumentIntRegXorFpuReg = false;
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static const intptr_t kShadowSpaceBytes = 0;
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static const intptr_t kVolatileCpuRegisters = R(RAX) | R(RCX) | R(RDX) |
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R(RSI) | R(RDI) | R(R8) |
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R(R9) | R(R10) | R(R11);
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static const intptr_t kVolatileXmmRegisters =
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R(XMM0) | R(XMM1) | R(XMM2) | R(XMM3) | R(XMM4) | R(XMM5) | R(XMM6) |
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R(XMM7) | R(XMM8) | R(XMM9) | R(XMM10) | R(XMM11) | R(XMM12) | R(XMM13) |
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R(XMM14) | R(XMM15);
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static const intptr_t kCalleeSaveCpuRegisters =
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R(RBX) | R(R12) | R(R13) | R(R14) | R(R15);
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static const intptr_t kCalleeSaveXmmRegisters = 0;
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static const XmmRegister xmmFirstNonParameterReg = XMM8;
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static constexpr Register kReturnReg = RAX;
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static constexpr Register kSecondReturnReg = kNoRegister;
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static constexpr FpuRegister kReturnFpuReg = XMM0;
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// Whether floating-point values should be passed as integers ("softfp" vs
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// "hardfp").
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static constexpr bool kAbiSoftFP = false;
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// Whether 64-bit arguments must be aligned to an even register or 8-byte
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// stack address. Not relevant on X64 since the word size is 64-bits already.
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static constexpr bool kAlignArguments = false;
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#endif
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COMPILE_ASSERT((kArgumentRegisters & kReservedCpuRegisters) == 0);
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static constexpr Register kFirstCalleeSavedCpuReg = RBX;
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static constexpr Register kFirstNonArgumentRegister = RAX;
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static constexpr Register kSecondNonArgumentRegister = RBX;
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static constexpr Register kStackPointerRegister = SPREG;
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COMPILE_ASSERT(((R(kFirstCalleeSavedCpuReg)) & kCalleeSaveCpuRegisters) != 0);
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COMPILE_ASSERT(((R(kFirstNonArgumentRegister) |
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R(kSecondNonArgumentRegister)) &
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kArgumentRegisters) == 0);
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};
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#undef R
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class Instr {
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public:
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static const uint8_t kHltInstruction = 0xF4;
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// We prefer not to use the int3 instruction since it conflicts with gdb.
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static const uint8_t kBreakPointInstruction = kHltInstruction;
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static const int kBreakPointInstructionSize = 1;
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static const uint8_t kGdbBreakpointInstruction = 0xcc;
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bool IsBreakPoint() {
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ASSERT(kBreakPointInstructionSize == 1);
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return (*reinterpret_cast<const uint8_t*>(this)) == kBreakPointInstruction;
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}
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// Instructions are read out of a code stream. The only way to get a
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// reference to an instruction is to convert a pointer. There is no way
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// to allocate or create instances of class Instr.
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// Use the At(pc) function to create references to Instr.
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static Instr* At(::dart::uword pc) { return reinterpret_cast<Instr*>(pc); }
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private:
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DISALLOW_ALLOCATION();
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// We need to prevent the creation of instances of class Instr.
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DISALLOW_IMPLICIT_CONSTRUCTORS(Instr);
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};
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// The largest multibyte nop we will emit. This could go up to 15 if it
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// becomes important to us.
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const int MAX_NOP_SIZE = 8;
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} // namespace arch_x64
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#endif // RUNTIME_VM_CONSTANTS_X64_H_
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