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![Samir Jindel](/assets/img/avatar_default.png)
The original revision is in patchset 1. Three bugs are fixed: 1. Fix SIMARM_X64 build: no need to generate trampolines for AOT or simulated JIT. 2. Hot-reload: Fix hot-reload: don't invalidate Code for force-optimized functions. 3. Windows: Provide shadow space to runtime routines. Cq-Include-Trybots: luci.dart.try:vm-kernel-precomp-mac-debug-simarm_x64-try,vm-kernel-precomp-mac-release-simarm_x64-try,vm-kernel-reload-linux-debug-x64-try,vm-kernel-reload-rollback-linux-debug-x64-try,vm-kernel-win-debug-ia32-try,vm-kernel-win-debug-x64-try,vm-kernel-win-release-ia32-try,vm-kernel-win-release-x64-try Change-Id: I326009cfacb51a84e9de4ddf9ff2d6d415460f91 Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/113829 Commit-Queue: Samir Jindel <sjindel@google.com> Reviewed-by: Martin Kustermann <kustermann@google.com>
169 lines
5.1 KiB
C++
169 lines
5.1 KiB
C++
// Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
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// for details. All rights reserved. Use of this source code is governed by a
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// BSD-style license that can be found in the LICENSE file.
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#ifndef RUNTIME_VM_CONSTANTS_IA32_H_
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#define RUNTIME_VM_CONSTANTS_IA32_H_
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#ifndef RUNTIME_VM_CONSTANTS_H_
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#error Do not include constants_ia32.h directly; use constants.h instead.
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#endif
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#include "platform/assert.h"
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namespace arch_ia32 {
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enum Register {
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EAX = 0,
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ECX = 1,
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EDX = 2,
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EBX = 3,
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ESP = 4,
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EBP = 5,
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ESI = 6,
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EDI = 7,
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kNumberOfCpuRegisters = 8,
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kNoRegister = -1, // Signals an illegal register.
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};
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enum ByteRegister {
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AL = 0,
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CL = 1,
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DL = 2,
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BL = 3,
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AH = 4,
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CH = 5,
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DH = 6,
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BH = 7,
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kNoByteRegister = -1 // Signals an illegal register.
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};
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enum XmmRegister {
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XMM0 = 0,
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XMM1 = 1,
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XMM2 = 2,
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XMM3 = 3,
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XMM4 = 4,
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XMM5 = 5,
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XMM6 = 6,
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XMM7 = 7,
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kNumberOfXmmRegisters = 8,
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kNoXmmRegister = -1 // Signals an illegal register.
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};
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// Architecture independent aliases.
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typedef XmmRegister FpuRegister;
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const FpuRegister FpuTMP = XMM7;
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const int kNumberOfFpuRegisters = kNumberOfXmmRegisters;
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const FpuRegister kNoFpuRegister = kNoXmmRegister;
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extern const char* cpu_reg_names[kNumberOfCpuRegisters];
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extern const char* fpu_reg_names[kNumberOfXmmRegisters];
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// Register aliases.
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const Register TMP = kNoRegister; // No scratch register used by assembler.
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const Register TMP2 = kNoRegister; // No second assembler scratch register.
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const Register CODE_REG = EDI;
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const Register PP = kNoRegister; // No object pool pointer.
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const Register SPREG = ESP; // Stack pointer register.
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const Register FPREG = EBP; // Frame pointer register.
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const Register ARGS_DESC_REG = EDX; // Arguments descriptor register.
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const Register THR = ESI; // Caches current thread in generated code.
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const Register CALLEE_SAVED_TEMP = EBX;
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const Register CALLEE_SAVED_TEMP2 = EDI;
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// ABI for catch-clause entry point.
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const Register kExceptionObjectReg = EAX;
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const Register kStackTraceObjectReg = EDX;
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// ABI for write barrier stub.
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const Register kWriteBarrierObjectReg = EDX;
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const Register kWriteBarrierValueReg = kNoRegister;
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const Register kWriteBarrierSlotReg = EDI;
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typedef uint32_t RegList;
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const RegList kAllCpuRegistersList = 0xFF;
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const intptr_t kReservedCpuRegisters = (1 << SPREG) | (1 << FPREG) | (1 << THR);
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// CPU registers available to Dart allocator.
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const RegList kDartAvailableCpuRegs =
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kAllCpuRegistersList & ~kReservedCpuRegisters;
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enum ScaleFactor {
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TIMES_1 = 0,
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TIMES_2 = 1,
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TIMES_4 = 2,
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TIMES_8 = 3,
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TIMES_16 = 4,
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TIMES_HALF_WORD_SIZE = ::dart::kWordSizeLog2 - 1
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};
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class Instr {
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public:
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static const uint8_t kHltInstruction = 0xF4;
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// We prefer not to use the int3 instruction since it conflicts with gdb.
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static const uint8_t kBreakPointInstruction = kHltInstruction;
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static const int kBreakPointInstructionSize = 1;
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bool IsBreakPoint() {
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ASSERT(kBreakPointInstructionSize == 1);
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return (*reinterpret_cast<const uint8_t*>(this)) == kBreakPointInstruction;
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}
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// Instructions are read out of a code stream. The only way to get a
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// reference to an instruction is to convert a pointer. There is no way
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// to allocate or create instances of class Instr.
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// Use the At(pc) function to create references to Instr.
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static Instr* At(::dart::uword pc) { return reinterpret_cast<Instr*>(pc); }
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private:
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DISALLOW_ALLOCATION();
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// We need to prevent the creation of instances of class Instr.
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DISALLOW_IMPLICIT_CONSTRUCTORS(Instr);
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};
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// The largest multibyte nop we will emit. This could go up to 15 if it
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// becomes important to us.
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const int MAX_NOP_SIZE = 8;
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class CallingConventions {
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public:
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static const Register ArgumentRegisters[];
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static const intptr_t kArgumentRegisters = 0;
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static const intptr_t kFpuArgumentRegisters = 0;
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static const intptr_t kNumArgRegs = 0;
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static const XmmRegister FpuArgumentRegisters[];
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static const intptr_t kXmmArgumentRegisters = 0;
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static const intptr_t kNumFpuArgRegs = 0;
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static constexpr intptr_t kCalleeSaveCpuRegisters =
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(1 << EDI) | (1 << ESI) | (1 << EBX);
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static const bool kArgumentIntRegXorFpuReg = false;
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// Whether floating-point values should be passed as integers ("softfp" vs
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// "hardfp").
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static constexpr bool kAbiSoftFP = false;
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static constexpr Register kReturnReg = EAX;
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static constexpr Register kSecondReturnReg = EDX;
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// Floating point values are returned on the "FPU stack" (in "ST" registers).
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static constexpr XmmRegister kReturnFpuReg = kNoXmmRegister;
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static constexpr Register kFirstCalleeSavedCpuReg = EBX;
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static constexpr Register kFirstNonArgumentRegister = EAX;
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static constexpr Register kSecondNonArgumentRegister = ECX;
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static constexpr Register kStackPointerRegister = SPREG;
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// Whether 64-bit arguments must be aligned to an even register or 8-byte
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// stack address. On IA32, 64-bit integers and floating-point values do *not*
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// need to be 8-byte aligned.
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static constexpr bool kAlignArguments = false;
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};
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} // namespace arch_ia32
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#endif // RUNTIME_VM_CONSTANTS_IA32_H_
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