mirror of
https://github.com/dart-lang/sdk
synced 2024-11-02 12:24:24 +00:00
8a179fb953
New folder structure (nested under vm/): - compiler/ - jit/ - JIT specific code - aot/ - AOT specific code - backend/ - all middle-end and back-end code (IL, flow graph) - assembler/ - assemblers and disassemblers - frontend/ - front ends (AST -> IL, Kernel -> IL) compiler/README.md would be the documentation root for the compiler pipeline Bug: https://github.com/dart-lang/sdk/issues/30575 Change-Id: I2dfd9688793bff737f7632ddc77fca766875ce36 Reviewed-on: https://dart-review.googlesource.com/2940 Reviewed-by: Vyacheslav Egorov <vegorov@google.com> Commit-Queue: Vyacheslav Egorov <vegorov@google.com>
298 lines
10 KiB
C++
298 lines
10 KiB
C++
// Copyright (c) 2012, the Dart project authors. Please see the AUTHORS file
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// for details. All rights reserved. Use of this source code is governed by a
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// BSD-style license that can be found in the LICENSE file.
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#include "vm/globals.h"
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#if defined(TARGET_ARCH_ARM)
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#include "vm/cpu.h"
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#include "vm/cpu_arm.h"
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#include "vm/compiler/assembler/assembler.h"
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#include "vm/cpuinfo.h"
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#include "vm/heap.h"
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#include "vm/isolate.h"
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#include "vm/object.h"
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#include "vm/simulator.h"
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#if !defined(USING_SIMULATOR)
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#include <sys/syscall.h> /* NOLINT */
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#include <unistd.h> /* NOLINT */
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#endif
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// ARM version differences.
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// We support three major 32-bit ARM ISA versions: ARMv5TE, ARMv6 and variants,
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// and ARMv7 and variants. For each of these we detect the presence of vfp,
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// neon, and integer division instructions. Considering ARMv5TE as the baseline,
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// later versions add the following features/instructions that we use:
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//
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// ARMv6:
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// - PC read offset in store instructions is 8 rather than 12, matching the
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// offset in read instructions,
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// - strex, ldrex, and clrex load/store/clear exclusive instructions,
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// - umaal multiplication instruction,
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// ARMv7:
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// - movw, movt 16-bit immediate load instructions,
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// - mls multiplication instruction,
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// - vmovs, vmovd floating point immediate load instructions.
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//
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// If an aarch64 CPU is detected, we generate ARMv7 code.
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//
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// If an instruction is missing on ARMv5TE or ARMv6, we emulate it, if possible.
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// Where we are missing vfp, we do not unbox doubles, or generate intrinsics for
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// floating point operations. Where we are missing neon, we do not unbox SIMD
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// values, or inline operations on SIMD values. Where we are missing integer
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// division, we do not inline division operations, and we do not generate
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// intrinsics that do division. See the feature tests in flow_graph_optimizer.cc
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// for details.
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//
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// Alignment:
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//
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// Before ARMv6, that is only for ARMv5TE, unaligned accesses will cause a
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// crash. This includes the ldrd and strd instructions, which must use addresses
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// that are 8-byte aligned. Since we don't always guarantee that for our uses
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// of ldrd and strd, these instructions are emulated with two load or store
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// instructions on ARMv5TE. On ARMv6 and on, we assume that the kernel is
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// set up to fixup unaligned accesses. This can be verified by checking
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// /proc/cpu/alignment on modern Linux systems.
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namespace dart {
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#if defined(TARGET_ARCH_ARM_5TE)
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DEFINE_FLAG(bool, use_vfp, false, "Use vfp instructions if supported");
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DEFINE_FLAG(bool, use_neon, false, "Use neon instructions if supported");
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DEFINE_FLAG(bool,
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use_integer_division,
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false,
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"Use integer division instruction if supported");
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#elif defined(TARGET_ARCH_ARM_6)
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DEFINE_FLAG(bool, use_vfp, true, "Use vfp instructions if supported");
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DEFINE_FLAG(bool, use_neon, false, "Use neon instructions if supported");
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DEFINE_FLAG(bool,
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use_integer_division,
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false,
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"Use integer division instruction if supported");
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#else
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DEFINE_FLAG(bool, use_vfp, true, "Use vfp instructions if supported");
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DEFINE_FLAG(bool, use_neon, true, "Use neon instructions if supported");
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DEFINE_FLAG(bool,
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use_integer_division,
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true,
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"Use integer division instruction if supported");
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#endif
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#if defined(USING_SIMULATOR)
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#if defined(TARGET_ARCH_ARM_5TE) || defined(TARGET_OS_ANDROID)
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DEFINE_FLAG(bool, sim_use_hardfp, false, "Use the hardfp ABI.");
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#else
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DEFINE_FLAG(bool, sim_use_hardfp, true, "Use the hardfp ABI.");
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#endif
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#endif
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void CPU::FlushICache(uword start, uword size) {
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#if HOST_OS_IOS
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// Precompilation never patches code so there should be no I cache flushes.
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UNREACHABLE();
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#endif
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#if !defined(USING_SIMULATOR) && !HOST_OS_IOS
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// Nothing to do. Flushing no instructions.
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if (size == 0) {
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return;
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}
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// ARM recommends using the gcc intrinsic __clear_cache on Linux, and the
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// library call cacheflush from unistd.h on Android:
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// blogs.arm.com/software-enablement/141-caches-and-self-modifying-code/
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#if defined(__linux__) && !defined(ANDROID)
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extern void __clear_cache(char*, char*);
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char* beg = reinterpret_cast<char*>(start);
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char* end = reinterpret_cast<char*>(start + size);
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::__clear_cache(beg, end);
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#elif defined(ANDROID)
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cacheflush(start, start + size, 0);
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#else
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#error FlushICache only tested/supported on Linux and Android
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#endif
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#endif
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}
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const char* CPU::Id() {
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return
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#if defined(USING_SIMULATOR)
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"sim"
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#endif // defined(USING_SIMULATOR)
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"arm";
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}
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bool HostCPUFeatures::integer_division_supported_ = false;
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bool HostCPUFeatures::vfp_supported_ = false;
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bool HostCPUFeatures::neon_supported_ = false;
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bool HostCPUFeatures::hardfp_supported_ = false;
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const char* HostCPUFeatures::hardware_ = NULL;
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ARMVersion HostCPUFeatures::arm_version_ = ARMvUnknown;
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intptr_t HostCPUFeatures::store_pc_read_offset_ = 8;
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#if defined(DEBUG)
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bool HostCPUFeatures::initialized_ = false;
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#endif
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#if !defined(USING_SIMULATOR)
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#if HOST_OS_IOS
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void HostCPUFeatures::InitOnce() {
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// TODO(24743): Actually check the CPU features and fail if we're missing
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// something assumed in a precompiled snapshot.
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hardware_ = "";
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// When the VM is targetted to ARMv7, pretend that the CPU is ARMv7 even if
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// the CPU is actually AArch64.
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arm_version_ = ARMv7;
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// Always assume we have floating point unit since we don't support ARMv6 in
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// this path.
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vfp_supported_ = FLAG_use_vfp;
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integer_division_supported_ = FLAG_use_integer_division;
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neon_supported_ = FLAG_use_neon;
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hardfp_supported_ = true;
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#if defined(DEBUG)
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initialized_ = true;
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#endif
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}
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#else // HOST_OS_IOS
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void HostCPUFeatures::InitOnce() {
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bool is_arm64 = false;
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CpuInfo::InitOnce();
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hardware_ = CpuInfo::GetCpuModel();
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// Check for ARMv5TE, ARMv6, ARMv7, or aarch64.
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// It can be in either the Processor or Model information fields.
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if (CpuInfo::FieldContains(kCpuInfoProcessor, "aarch64") ||
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CpuInfo::FieldContains(kCpuInfoModel, "aarch64") ||
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CpuInfo::FieldContains(kCpuInfoArchitecture, "8") ||
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CpuInfo::FieldContains(kCpuInfoArchitecture, "AArch64")) {
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// pretend that this arm64 cpu is really an ARMv7
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arm_version_ = ARMv7;
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is_arm64 = true;
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} else if (CpuInfo::FieldContains(kCpuInfoProcessor, "ARM926EJ-S") ||
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CpuInfo::FieldContains(kCpuInfoModel, "ARM926EJ-S")) {
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// Lego Mindstorm EV3.
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arm_version_ = ARMv5TE;
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// On ARMv5, the PC read offset in an STR or STM instruction is either 8 or
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// 12 bytes depending on the implementation. On the Mindstorm EV3 it is 12
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// bytes.
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store_pc_read_offset_ = 12;
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} else if (CpuInfo::FieldContains(kCpuInfoProcessor, "Feroceon 88FR131") ||
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CpuInfo::FieldContains(kCpuInfoModel, "Feroceon 88FR131")) {
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// This is for the DGBox. For the time-being, assume it is similar to the
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// Lego Mindstorm.
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arm_version_ = ARMv5TE;
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store_pc_read_offset_ = 12;
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} else if (CpuInfo::FieldContains(kCpuInfoProcessor, "ARMv6") ||
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CpuInfo::FieldContains(kCpuInfoModel, "ARMv6")) {
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// Raspberry Pi, etc.
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arm_version_ = ARMv6;
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} else {
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ASSERT(CpuInfo::FieldContains(kCpuInfoProcessor, "ARMv7") ||
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CpuInfo::FieldContains(kCpuInfoModel, "ARMv7"));
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arm_version_ = ARMv7;
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}
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// Has floating point unit.
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vfp_supported_ =
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(CpuInfo::FieldContains(kCpuInfoFeatures, "vfp") || is_arm64) &&
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FLAG_use_vfp;
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// Has integer division.
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// Special cases:
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// - Qualcomm Krait CPUs (QCT APQ8064) in Nexus 4 and 7 incorrectly report
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// that they lack integer division.
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// - Marvell Armada 370/XP incorrectly reports that it has integer division.
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bool is_krait = CpuInfo::FieldContains(kCpuInfoHardware, "QCT APQ8064");
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bool is_armada_370xp =
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CpuInfo::FieldContains(kCpuInfoHardware, "Marvell Armada 370/XP");
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#if defined(HOST_OS_ANDROID)
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bool is_android = true;
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#else
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bool is_android = false;
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#endif
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if (is_krait) {
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integer_division_supported_ = FLAG_use_integer_division;
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} else if (is_android && is_arm64) {
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// Various Android ARM64 devices, including the Qualcomm Snapdragon 820/821
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// CPUs (MSM 8996 and MSM8996pro) in Xiaomi MI5 and Pixel lack integer
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// division even though ARMv8 requires it in A32. Instead of attempting to
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// track all of these devices, we conservatively disable use of integer
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// division on Android ARM64 devices.
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// TODO(29270): /proc/self/auxv might be more reliable here.
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integer_division_supported_ = false;
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} else if (is_armada_370xp) {
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integer_division_supported_ = false;
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} else {
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integer_division_supported_ =
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(CpuInfo::FieldContains(kCpuInfoFeatures, "idiva") || is_arm64) &&
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FLAG_use_integer_division;
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}
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neon_supported_ =
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(CpuInfo::FieldContains(kCpuInfoFeatures, "neon") || is_arm64) &&
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FLAG_use_vfp && FLAG_use_neon;
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// Use the cross-compiler's predefined macros to determine whether we should
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// use the hard or soft float ABI.
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#if defined(__ARM_PCS_VFP)
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hardfp_supported_ = true;
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#else
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hardfp_supported_ = false;
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#endif
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#if defined(DEBUG)
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initialized_ = true;
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#endif
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}
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#endif // HOST_OS_IOS
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void HostCPUFeatures::Cleanup() {
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DEBUG_ASSERT(initialized_);
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#if defined(DEBUG)
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initialized_ = false;
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#endif
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ASSERT(hardware_ != NULL);
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free(const_cast<char*>(hardware_));
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hardware_ = NULL;
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CpuInfo::Cleanup();
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}
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#else
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void HostCPUFeatures::InitOnce() {
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CpuInfo::InitOnce();
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hardware_ = CpuInfo::GetCpuModel();
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#if defined(TARGET_ARCH_ARM_5TE)
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arm_version_ = ARMv5TE;
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#elif defined(TARGET_ARCH_ARM_6)
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arm_version_ = ARMv6;
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#else
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arm_version_ = ARMv7;
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#endif
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integer_division_supported_ = FLAG_use_integer_division;
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vfp_supported_ = FLAG_use_vfp;
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neon_supported_ = FLAG_use_vfp && FLAG_use_neon;
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hardfp_supported_ = FLAG_sim_use_hardfp;
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#if defined(DEBUG)
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initialized_ = true;
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#endif
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}
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void HostCPUFeatures::Cleanup() {
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DEBUG_ASSERT(initialized_);
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#if defined(DEBUG)
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initialized_ = false;
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#endif
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ASSERT(hardware_ != NULL);
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free(const_cast<char*>(hardware_));
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hardware_ = NULL;
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CpuInfo::Cleanup();
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}
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#endif // !defined(USING_SIMULATOR)
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} // namespace dart
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#endif // defined TARGET_ARCH_ARM
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