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dart-sdk/runtime/vm/compiler/assembler
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Slava Egorov d94a1cd419 Revert "[vm, compiler] Implement unboxed SIMD for RISC-V via lowering." 
This reverts commit 460bd7a03a.

Reason for revert: build and layout benchmarks seem to be failing on Golem

Original change's description:
> [vm, compiler] Implement unboxed SIMD for RISC-V via lowering.
>
> TEST=ci
> Change-Id: Ice2ec0847ee43ff9b8c5859ba15dbbeee48ba36e
> Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/250943
> Reviewed-by: Alexander Markov <alexmarkov@google.com>
> Commit-Queue: Ryan Macnak <rmacnak@google.com>
> Reviewed-by: Slava Egorov <vegorov@google.com>

TBR=vegorov@google.com,rmacnak@google.com,alexmarkov@google.com

Change-Id: I062bc13d0d941fcabf4c67a696fc2be324f0e1c3
No-Presubmit: true
No-Tree-Checks: true
No-Try: true
Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/253580
Bot-Commit: Rubber Stamper <rubber-stamper@appspot.gserviceaccount.com>
Commit-Queue: Slava Egorov <vegorov@google.com>
Reviewed-by: Slava Egorov <vegorov@google.com>
2022-08-03 10:32:46 +00:00
..
assembler.h [vm] Support RISC-V. 2022-01-20 00:57:57 +00:00
assembler_arm.cc [vm] New async/async* implementation in JIT mode 2022-06-02 23:39:45 +00:00
assembler_arm.h Fix typos 2022-06-15 11:08:28 +00:00
assembler_arm64.cc Revert "[vm, compiler] Implement unboxed SIMD for RISC-V via lowering." 2022-08-03 10:32:46 +00:00
assembler_arm64.h Revert "[vm, compiler] Implement unboxed SIMD for RISC-V via lowering." 2022-08-03 10:32:46 +00:00
assembler_arm64_test.cc [vm, compiler] Make more use of the zero register on ARM64 and RV. 2022-05-24 22:12:17 +00:00
assembler_arm_test.cc [vm/sim/simd] Fix vmin/vmax implementation on simulator. 2022-05-11 16:59:24 +00:00
assembler_base.cc [vm, compiler] Load unboxed doubles directly from the literal pool. 2022-05-10 21:31:40 +00:00
assembler_base.h [vm, compiler] Remove dead kKeepCalleePP. 2022-04-21 20:30:58 +00:00
assembler_ia32.cc Revert "[vm, compiler] Implement unboxed SIMD for RISC-V via lowering." 2022-08-03 10:32:46 +00:00
assembler_ia32.h Revert "[vm, compiler] Implement unboxed SIMD for RISC-V via lowering." 2022-08-03 10:32:46 +00:00
assembler_ia32_test.cc [vm, compiler] Emit constant-width addresses in IA32 disassembly for the absolute addressing mode. 2022-06-16 16:03:19 +00:00
assembler_riscv.cc Revert "[vm, compiler] Implement unboxed SIMD for RISC-V via lowering." 2022-08-03 10:32:46 +00:00
assembler_riscv.h Revert "[vm, compiler] Implement unboxed SIMD for RISC-V via lowering." 2022-08-03 10:32:46 +00:00
assembler_riscv_test.cc [vm, compiler] Use RISC-V's compare-and-branch for a shorter write barrier sequence. 2022-06-23 15:58:15 +00:00
assembler_test.cc [vm] Fix vm/cc/AllocationSinking_Arrays and StoreIntoObject with compressed pointers. 2021-07-12 21:10:37 +00:00
assembler_x64.cc Revert "[vm, compiler] Implement unboxed SIMD for RISC-V via lowering." 2022-08-03 10:32:46 +00:00
assembler_x64.h Revert "[vm, compiler] Implement unboxed SIMD for RISC-V via lowering." 2022-08-03 10:32:46 +00:00
assembler_x64_test.cc Added byte registers to the x86-64 disassembler 2022-06-08 22:57:03 +00:00
disassembler.cc [vm, compiler] Include the global object pool in AOT's --disassemble. 2022-05-12 17:38:35 +00:00
disassembler.h [vm] Small fixes 2022-07-04 07:53:39 +00:00
disassembler_arm.cc Reland "[build] Fix Android build for ARM64 Mac." 2022-05-10 16:11:53 +00:00
disassembler_arm64.cc [vm, compiler] Make more use of the zero register on ARM64 and RV. 2022-05-24 22:12:17 +00:00
disassembler_riscv.cc [vm] Support RISC-V. 2022-01-20 00:57:57 +00:00
disassembler_test.cc
disassembler_x86.cc [vm, compiler] Emit constant-width addresses in IA32 disassembly for the absolute addressing mode. 2022-06-16 16:03:19 +00:00
object_pool_builder.h [vm, compiler] Load unboxed doubles directly from the literal pool. 2022-05-10 21:31:40 +00:00