diff --git a/runtime/bin/ffi_test/ffi_test_functions_vmspecific.cc b/runtime/bin/ffi_test/ffi_test_functions_vmspecific.cc index a3235827ebd..c6fde24644f 100644 --- a/runtime/bin/ffi_test/ffi_test_functions_vmspecific.cc +++ b/runtime/bin/ffi_test/ffi_test_functions_vmspecific.cc @@ -185,7 +185,10 @@ DART_EXPORT void* TestUnprotectCode(void (*fn)(void)) { // Clobbers some registers with special meaning in Dart before re-entry, for // stress-testing. Not used on 32-bit Windows due to complications with Windows // "safeseh". -#if defined(DART_TARGET_OS_WINDOWS) && defined(HOST_ARCH_IA32) +// TODO(47824): Figure out how ARM/ARM64 syntax is different on Windows. +#if defined(DART_TARGET_OS_WINDOWS) && \ + (defined(HOST_ARCH_IA32) || defined(HOST_ARCH_ARM) || \ + defined(HOST_ARCH_ARM64)) void ClobberAndCall(void (*fn)()) { fn(); } diff --git a/runtime/third_party/double-conversion/src/utils.h b/runtime/third_party/double-conversion/src/utils.h index c419a6c31db..fe3e359dd86 100644 --- a/runtime/third_party/double-conversion/src/utils.h +++ b/runtime/third_party/double-conversion/src/utils.h @@ -67,16 +67,22 @@ inline void abort_noreturn() { abort(); } // the output of the division with the expected result. (Inlining must be // disabled.) // On Linux,x86 89255e-22 != Div_double(89255.0/1e22) -#if defined(_M_X64) || defined(__x86_64__) || defined(__ARMEL__) || \ - defined(__avr32__) || defined(__hppa__) || defined(__ia64__) || \ - defined(__mips__) || defined(__powerpc__) || defined(__ppc__) || \ - defined(__ppc64__) || defined(_POWER) || defined(_ARCH_PPC) || \ - defined(_ARCH_PPC64) || defined(__sparc__) || defined(__sparc) || \ - defined(__s390__) || defined(__SH4__) || defined(__alpha__) || \ - defined(_MIPS_ARCH_MIPS32R2) || defined(__AARCH64EL__) || \ - defined(__aarch64__) || defined(__riscv) +#if defined(_M_X64) || defined(__x86_64__) || \ + defined(__ARMEL__) || defined(__avr32__) || defined(_M_ARM) || defined(_M_ARM64) || \ + defined(__hppa__) || defined(__ia64__) || \ + defined(__mips__) || \ + defined(__powerpc__) || defined(__ppc__) || defined(__ppc64__) || \ + defined(_POWER) || defined(_ARCH_PPC) || defined(_ARCH_PPC64) || \ + defined(__sparc__) || defined(__sparc) || defined(__s390__) || \ + defined(__SH4__) || defined(__alpha__) || \ + defined(_MIPS_ARCH_MIPS32R2) || \ + defined(__AARCH64EL__) || defined(__aarch64__) || defined(__AARCH64EB__) || \ + defined(__riscv) || \ + defined(__or1k__) || defined(__arc__) || \ + defined(__EMSCRIPTEN__) #define DOUBLE_CONVERSION_CORRECT_DOUBLE_OPERATIONS 1 -#elif defined(__mc68000__) +#elif defined(__mc68000__) || \ + defined(__pnacl__) || defined(__native_client__) #undef DOUBLE_CONVERSION_CORRECT_DOUBLE_OPERATIONS #elif defined(_M_IX86) || defined(__i386__) || defined(__i386) #if defined(_WIN32) diff --git a/runtime/vm/compiler/assembler/assembler_arm.cc b/runtime/vm/compiler/assembler/assembler_arm.cc index 795745a8b72..bca236c39a6 100644 --- a/runtime/vm/compiler/assembler/assembler_arm.cc +++ b/runtime/vm/compiler/assembler/assembler_arm.cc @@ -271,7 +271,7 @@ void Assembler::bics(Register rd, Register rn, Operand o, Condition cond) { EmitType01(cond, o.type(), BIC, 1, rn, rd, o); } -void Assembler::mvn(Register rd, Operand o, Condition cond) { +void Assembler::mvn_(Register rd, Operand o, Condition cond) { EmitType01(cond, o.type(), MVN, 0, R0, rd, o); } @@ -2779,7 +2779,7 @@ void Assembler::LoadImmediate(Register rd, int32_t value, Condition cond) { if (Operand::CanHold(value, &o)) { mov(rd, o, cond); } else if (Operand::CanHold(~value, &o)) { - mvn(rd, o, cond); + mvn_(rd, o, cond); } else { LoadDecodableImmediate(rd, value, cond); } @@ -3072,10 +3072,10 @@ void Assembler::AddImmediate(Register rd, } else { ASSERT(rn != IP); if (Operand::CanHold(~value, &o)) { - mvn(IP, o, cond); + mvn_(IP, o, cond); add(rd, rn, Operand(IP), cond); } else if (Operand::CanHold(~(-value), &o)) { - mvn(IP, o, cond); + mvn_(IP, o, cond); sub(rd, rn, Operand(IP), cond); } else if (value > 0) { LoadDecodableImmediate(IP, value, cond); @@ -3101,11 +3101,11 @@ void Assembler::AddImmediateSetFlags(Register rd, } else { ASSERT(rn != IP); if (Operand::CanHold(~value, &o)) { - mvn(IP, o, cond); + mvn_(IP, o, cond); adds(rd, rn, Operand(IP), cond); } else if (Operand::CanHold(~(-value), &o)) { ASSERT(value != kMinInt32); // Would cause erroneous overflow detection. - mvn(IP, o, cond); + mvn_(IP, o, cond); subs(rd, rn, Operand(IP), cond); } else { LoadDecodableImmediate(IP, value, cond); @@ -3135,11 +3135,11 @@ void Assembler::SubImmediateSetFlags(Register rd, } else { ASSERT(rn != IP); if (Operand::CanHold(~value, &o)) { - mvn(IP, o, cond); + mvn_(IP, o, cond); subs(rd, rn, Operand(IP), cond); } else if (Operand::CanHold(~(-value), &o)) { ASSERT(value != kMinInt32); // Would cause erroneous overflow detection. - mvn(IP, o, cond); + mvn_(IP, o, cond); adds(rd, rn, Operand(IP), cond); } else { LoadDecodableImmediate(IP, value, cond); diff --git a/runtime/vm/compiler/assembler/assembler_arm.h b/runtime/vm/compiler/assembler/assembler_arm.h index 877820aab54..2f2f1fb80b4 100644 --- a/runtime/vm/compiler/assembler/assembler_arm.h +++ b/runtime/vm/compiler/assembler/assembler_arm.h @@ -500,7 +500,7 @@ class Assembler : public AssemblerBase { void bic(Register rd, Register rn, Operand o, Condition cond = AL); void bics(Register rd, Register rn, Operand o, Condition cond = AL); - void mvn(Register rd, Operand o, Condition cond = AL); + void mvn_(Register rd, Operand o, Condition cond = AL); void mvns(Register rd, Operand o, Condition cond = AL); // Miscellaneous data-processing instructions. diff --git a/runtime/vm/compiler/assembler/assembler_arm64.h b/runtime/vm/compiler/assembler/assembler_arm64.h index b5ed07bd155..33fa8bbd67a 100644 --- a/runtime/vm/compiler/assembler/assembler_arm64.h +++ b/runtime/vm/compiler/assembler/assembler_arm64.h @@ -1586,7 +1586,9 @@ class Assembler : public AssemblerBase { } } void vmov(VRegister vd, VRegister vn) { vorr(vd, vn, vn); } - void mvn(Register rd, Register rm) { orn(rd, ZR, Operand(rm)); } + void mvn_(Register rd, Register rm) { + orn(rd, ZR, Operand(rm)); + } void mvnw(Register rd, Register rm) { ornw(rd, ZR, Operand(rm)); } void neg(Register rd, Register rm) { sub(rd, ZR, Operand(rm)); } void negs(Register rd, Register rm, OperandSize sz = kEightBytes) { diff --git a/runtime/vm/compiler/assembler/assembler_arm64_test.cc b/runtime/vm/compiler/assembler/assembler_arm64_test.cc index cb29a3c35c5..a95b7fe9a6d 100644 --- a/runtime/vm/compiler/assembler/assembler_arm64_test.cc +++ b/runtime/vm/compiler/assembler/assembler_arm64_test.cc @@ -3258,8 +3258,7 @@ ASSEMBLER_TEST_GENERATE(Smaddl3, assembler) { ASSEMBLER_TEST_RUN(Smaddl3, test) { typedef int64_t (*Int64Return)() DART_UNUSED; - EXPECT_EQ(0xffffl * 0xffffl, - EXECUTE_TEST_CODE_INT64(Int64Return, test->entry())); + EXPECT_EQ(0xfffe0001, EXECUTE_TEST_CODE_INT64(Int64Return, test->entry())); EXPECT_DISASSEMBLY( "movz r1, #0xffff\n" "movz r2, #0xffff\n" diff --git a/runtime/vm/compiler/assembler/assembler_arm_test.cc b/runtime/vm/compiler/assembler/assembler_arm_test.cc index 64db0aeef67..11adcf2092f 100644 --- a/runtime/vm/compiler/assembler/assembler_arm_test.cc +++ b/runtime/vm/compiler/assembler/assembler_arm_test.cc @@ -75,7 +75,7 @@ ASSEMBLER_TEST_RUN(Simple, test) { } ASSEMBLER_TEST_GENERATE(MoveNegated, assembler) { - __ mvn(R0, Operand(42)); + __ mvn_(R0, Operand(42)); __ Ret(); } @@ -988,7 +988,7 @@ ASSEMBLER_TEST_GENERATE(Clz, assembler) { __ clz(R2, R2); __ cmp(R2, Operand(26)); __ b(&error, NE); - __ mvn(R0, Operand(0)); + __ mvn_(R0, Operand(0)); __ clz(R1, R0); __ cmp(R1, Operand(0)); __ b(&error, NE); diff --git a/runtime/vm/compiler/backend/il_arm.cc b/runtime/vm/compiler/backend/il_arm.cc index f92d2977b17..fde11b6093c 100644 --- a/runtime/vm/compiler/backend/il_arm.cc +++ b/runtime/vm/compiler/backend/il_arm.cc @@ -5786,7 +5786,7 @@ void UnarySmiOpInstr::EmitNativeCode(FlowGraphCompiler* compiler) { break; } case Token::kBIT_NOT: - __ mvn(result, compiler::Operand(value)); + __ mvn_(result, compiler::Operand(value)); // Remove inverted smi-tag. __ bic(result, result, compiler::Operand(kSmiTagMask)); break; @@ -7071,8 +7071,8 @@ void UnaryInt64OpInstr::EmitNativeCode(FlowGraphCompiler* compiler) { switch (op_kind()) { case Token::kBIT_NOT: - __ mvn(out_lo, compiler::Operand(left_lo)); - __ mvn(out_hi, compiler::Operand(left_hi)); + __ mvn_(out_lo, compiler::Operand(left_lo)); + __ mvn_(out_hi, compiler::Operand(left_hi)); break; case Token::kNEGATE: __ rsbs(out_lo, left_lo, compiler::Operand(0)); @@ -7143,7 +7143,7 @@ void UnaryUint32OpInstr::EmitNativeCode(FlowGraphCompiler* compiler) { ASSERT(op_kind() == Token::kBIT_NOT); - __ mvn(out, compiler::Operand(left)); + __ mvn_(out, compiler::Operand(left)); } LocationSummary* IntConverterInstr::MakeLocationSummary(Zone* zone, diff --git a/runtime/vm/compiler/backend/il_arm64.cc b/runtime/vm/compiler/backend/il_arm64.cc index 3dbb6b09487..750689423f7 100644 --- a/runtime/vm/compiler/backend/il_arm64.cc +++ b/runtime/vm/compiler/backend/il_arm64.cc @@ -4832,7 +4832,7 @@ void UnarySmiOpInstr::EmitNativeCode(FlowGraphCompiler* compiler) { break; } case Token::kBIT_NOT: - __ mvn(result, value); + __ mvn_(result, value); // Remove inverted smi-tag. __ andi(result, result, compiler::Immediate(~kSmiTagMask)); break; @@ -6145,7 +6145,7 @@ void UnaryInt64OpInstr::EmitNativeCode(FlowGraphCompiler* compiler) { const Register out = locs()->out(0).reg(); switch (op_kind()) { case Token::kBIT_NOT: - __ mvn(out, left); + __ mvn_(out, left); break; case Token::kNEGATE: __ sub(out, ZR, compiler::Operand(left)); diff --git a/runtime/vm/cpu_arm.cc b/runtime/vm/cpu_arm.cc index b18056a8199..eef10843763 100644 --- a/runtime/vm/cpu_arm.cc +++ b/runtime/vm/cpu_arm.cc @@ -14,15 +14,12 @@ #include "vm/object.h" #include "vm/simulator.h" -#if defined(DART_HOST_OS_IOS) +#if !defined(TARGET_HOST_MISMATCH) +#if defined(DART_HOST_OS_MACOS) || defined(DART_HOST_OS_IOS) #include #elif defined(DART_HOST_OS_WINDOWS) #include #endif - -#if !defined(TARGET_HOST_MISMATCH) -#include /* NOLINT */ -#include /* NOLINT */ #endif // ARM version differences. diff --git a/runtime/vm/cpu_arm64.cc b/runtime/vm/cpu_arm64.cc index 1ae9f0df802..10827ba7c45 100644 --- a/runtime/vm/cpu_arm64.cc +++ b/runtime/vm/cpu_arm64.cc @@ -12,19 +12,14 @@ #include "vm/simulator.h" #if !defined(USING_SIMULATOR) -#if !defined(DART_HOST_OS_FUCHSIA) -#include -#else +#if defined(DART_HOST_OS_FUCHSIA) #include -#endif -#include -#endif - -#if defined(DART_HOST_OS_MACOS) || defined(DART_HOST_OS_IOS) +#elif defined(DART_HOST_OS_MACOS) || defined(DART_HOST_OS_IOS) #include #elif defined(DART_HOST_OS_WINDOWS) #include #endif +#endif namespace dart { diff --git a/runtime/vm/globals.h b/runtime/vm/globals.h index 1a3d6c04dfd..c564a48eebc 100644 --- a/runtime/vm/globals.h +++ b/runtime/vm/globals.h @@ -180,12 +180,9 @@ static const uword kZapUninitializedWord = 0xabababababababab; __asm { mov fp, ebp} \ ; // NOLINT // clang-format on -#elif defined(HOST_ARCH_X64) -// We don't have the asm equivalent to get at the frame pointer on -// windows x64, return the stack pointer instead. -#define COPY_FP_REGISTER(fp) fp = OSThread::GetCurrentStackPointer(); #else -#error Unknown host architecture. +// Inline assembly is only available on x86; return the stack pointer instead. +#define COPY_FP_REGISTER(fp) fp = OSThread::GetCurrentStackPointer(); #endif #else // !defined(DART_HOST_OS_WINDOWS)) diff --git a/runtime/vm/profiler.cc b/runtime/vm/profiler.cc index d8ae4afe7fd..fb9bb9d8dc5 100644 --- a/runtime/vm/profiler.cc +++ b/runtime/vm/profiler.cc @@ -416,6 +416,14 @@ void Profiler::DumpStackTrace(void* context) { uword pc = static_cast(ctx->Rip); uword fp = static_cast(ctx->Rbp); uword sp = static_cast(ctx->Rsp); +#elif defined(HOST_ARCH_ARM) + uword pc = static_cast(ctx->Pc); + uword fp = static_cast(ctx->R11); + uword sp = static_cast(ctx->Sp); +#elif defined(HOST_ARCH_ARM64) + uword pc = static_cast(ctx->Pc); + uword fp = static_cast(ctx->Fp); + uword sp = static_cast(ctx->Sp); #else #error Unsupported architecture. #endif diff --git a/runtime/vm/thread_interrupter_win.cc b/runtime/vm/thread_interrupter_win.cc index 3db50234b3f..a7cdef781b5 100644 --- a/runtime/vm/thread_interrupter_win.cc +++ b/runtime/vm/thread_interrupter_win.cc @@ -26,7 +26,8 @@ class ThreadInterrupterWin : public AllStatic { #if defined(HOST_ARCH_IA32) // On IA32, CONTEXT_CONTROL includes Eip, Ebp, and Esp. context.ContextFlags = CONTEXT_CONTROL; -#elif defined(HOST_ARCH_X64) +#elif defined(HOST_ARCH_X64) || defined(HOST_ARCH_ARM) || \ + defined(HOST_ARCH_ARM64) // On X64, CONTEXT_CONTROL includes Rip and Rsp. Rbp is classified // as an "integer" register. context.ContextFlags = CONTEXT_CONTROL | CONTEXT_INTEGER; @@ -44,6 +45,16 @@ class ThreadInterrupterWin : public AllStatic { state->fp = static_cast(context.Rbp); state->csp = static_cast(context.Rsp); state->dsp = static_cast(context.Rsp); +#elif defined(HOST_ARCH_ARM) + state->pc = static_cast(context.Pc); + state->fp = static_cast(context.R11); + state->csp = static_cast(context.Sp); + state->dsp = static_cast(context.Sp); +#elif defined(HOST_ARCH_ARM64) + state->pc = static_cast(context.Pc); + state->fp = static_cast(context.Fp); + state->csp = static_cast(context.Sp); + state->dsp = static_cast(context.X15); #else #error Unsupported architecture. #endif