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[vm] Fix errors compiling with GCC.

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Change-Id: Ia3127ba9ef4ee1faf1f85a6eaa0dafd0cf187b2b
Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/99376
Reviewed-by: Aart Bik <ajcbik@google.com>
Reviewed-by: Martin Kustermann <kustermann@google.com>
Reviewed-by: Samir Jindel <sjindel@google.com>
Commit-Queue: Ryan Macnak <rmacnak@google.com>
This commit is contained in:
Ryan Macnak 2019-04-24 23:12:45 +00:00 committed by commit-bot@chromium.org
parent 225516466f
commit 3fd6fa4ff7
18 changed files with 91 additions and 62 deletions
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7
runtime/bin/ffi_test_functions.cc
View file

@ -85,7 +85,7 @@ DART_EXPORT intptr_t TakeMinInt16(int16_t x) {
}
DART_EXPORT intptr_t TakeMinInt32(int32_t x) {
const int64_t expected = -(int32_t)0x80000000;
const int64_t expected = kMinInt32;
const int64_t received = x;
return expected == received ? 1 : 0;
}
@ -467,7 +467,7 @@ DART_EXPORT double SmallDouble() {
// truncated.
DART_EXPORT void* LargePointer() {
uint64_t origin = 0x8100000082000000;
return *reinterpret_cast<void**>(&origin);
return reinterpret_cast<void*>(origin);
}
// Allocates 'count'-many Mint boxes, to stress-test GC during an FFI call.
@ -504,7 +504,8 @@ DART_EXPORT void AllocateThroughDart(uint64_t count) {
DART_EXPORT int RedirectStderr() {
char filename[256];
snprintf(filename, sizeof(filename), "/tmp/captured_stderr_%d", getpid());
freopen(filename, "w", stderr);
FILE* f = freopen(filename, "w", stderr);
ASSERT(f);
printf("Got file %s\n", filename);
return getpid();
}

1
runtime/vm/catch_entry_moves_test.cc
View file

@ -3,6 +3,7 @@
// BSD-style license that can be found in the LICENSE file.
#include <functional>
#include <memory>
#include <utility>
#include "platform/assert.h"

8
runtime/vm/compiler/backend/il.h
View file

@ -7665,10 +7665,10 @@ class BitCastInstr : public TemplateDefinition<1, NoThrow, Pure> {
from_representation_(from),
to_representation_(to) {
ASSERT(from != to);
ASSERT(to == kUnboxedInt32 && from == kUnboxedFloat ||
to == kUnboxedFloat && from == kUnboxedInt32 ||
to == kUnboxedInt64 && from == kUnboxedDouble ||
to == kUnboxedDouble && from == kUnboxedInt64);
ASSERT((to == kUnboxedInt32 && from == kUnboxedFloat) ||
(to == kUnboxedFloat && from == kUnboxedInt32) ||
(to == kUnboxedInt64 && from == kUnboxedDouble) ||
(to == kUnboxedDouble && from == kUnboxedInt64));
SetInputAt(0, value);
}

2
runtime/vm/compiler/jit/compiler.cc
View file

@ -785,7 +785,7 @@ RawCode* CompileParsedFunctionHelper::Compile(CompilationPipeline* pipeline) {
static RawObject* CompileFunctionHelper(CompilationPipeline* pipeline,
const Function& function,
bool optimized,
volatile bool optimized,
intptr_t osr_id) {
ASSERT(!FLAG_precompiled_mode);
ASSERT(!optimized || function.WasCompiled() || function.ForceOptimize());

4
runtime/vm/compiler/relocation.h
View file

@ -34,7 +34,9 @@ class UnresolvedCall : public IntrusiveDListEntry<UnresolvedCall>,
offset_into_target(offset_into_target) {}
UnresolvedCall(const UnresolvedCall& other)
: caller(other.caller),
: IntrusiveDListEntry<UnresolvedCall>(),
IntrusiveDListEntry<UnresolvedCall, 2>(),
caller(other.caller),
call_offset(other.call_offset),
text_offset(other.text_offset),
callee(other.callee),

12
runtime/vm/constants_arm.cc
View file

@ -7,6 +7,18 @@
namespace arch_arm {
const char* cpu_reg_names[kNumberOfCpuRegisters] = {
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
"r8", "ctx", "pp", "fp", "ip", "sp", "lr", "pc",
};
const char* fpu_reg_names[kNumberOfFpuRegisters] = {
"q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7",
#if defined(VFPv3_D32)
"q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15",
#endif
};
const Register CallingConventions::ArgumentRegisters[] = {R0, R1, R2, R3};
// Although 'kFpuArgumentRegisters' is 0, we have to give this array at least

13
runtime/vm/constants_arm.h
View file

@ -265,17 +265,8 @@ const FpuRegister FpuTMP = QTMP;
const int kNumberOfFpuRegisters = kNumberOfQRegisters;
const FpuRegister kNoFpuRegister = kNoQRegister;
static const char* cpu_reg_names[kNumberOfCpuRegisters] = {
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
"r8", "ctx", "pp", "fp", "ip", "sp", "lr", "pc",
};
static const char* fpu_reg_names[kNumberOfFpuRegisters] = {
"q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7",
#if defined(VFPv3_D32)
"q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15",
#endif
};
extern const char* cpu_reg_names[kNumberOfCpuRegisters];
extern const char* fpu_reg_names[kNumberOfFpuRegisters];
// Register aliases.
const Register TMP = IP; // Used as scratch register by assembler.

12
runtime/vm/constants_arm64.cc
View file

@ -7,6 +7,18 @@
namespace arch_arm64 {
const char* cpu_reg_names[kNumberOfCpuRegisters] = {
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10",
"r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19", "r20", "r21",
"r22", "r23", "r24", "ip0", "ip1", "pp", "ctx", "fp", "lr", "r31",
};
const char* fpu_reg_names[kNumberOfFpuRegisters] = {
"v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10",
"v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21",
"v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31",
};
const Register CallingConventions::ArgumentRegisters[] = {
R0, R1, R2, R3, R4, R5, R6, R7,
};

13
runtime/vm/constants_arm64.h
View file

@ -108,17 +108,8 @@ const FpuRegister FpuTMP = VTMP;
const int kNumberOfFpuRegisters = kNumberOfVRegisters;
const FpuRegister kNoFpuRegister = kNoVRegister;
static const char* cpu_reg_names[kNumberOfCpuRegisters] = {
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10",
"r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19", "r20", "r21",
"r22", "r23", "r24", "ip0", "ip1", "pp", "ctx", "fp", "lr", "r31",
};
static const char* fpu_reg_names[kNumberOfFpuRegisters] = {
"v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10",
"v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21",
"v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31",
};
extern const char* cpu_reg_names[kNumberOfCpuRegisters];
extern const char* fpu_reg_names[kNumberOfFpuRegisters];
// Register aliases.
const Register TMP = R16; // Used as scratch register by assembler.

25
runtime/vm/constants_dbc.cc Normal file
View file

@ -0,0 +1,25 @@
// Copyright (c) 2019, the Dart project authors. Please see the AUTHORS file
// for details. All rights reserved. Use of this source code is governed by a
// BSD-style license that can be found in the LICENSE file.
#define RUNTIME_VM_CONSTANTS_H_ // To work around include guard.
#include "vm/constants_dbc.h"
namespace dart {
const char* cpu_reg_names[kNumberOfCpuRegisters] = {
"R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7", "R8", "R9", "R10",
"R11", "R12", "R13", "R14", "R15", "R16", "R17", "R18", "R19", "R20", "R21",
"R22", "R23", "R24", "R25", "R26", "R27", "R28", "R29", "R30", "R31",
#if defined(ARCH_IS_64_BIT)
"R32", "R33", "R34", "R35", "R36", "R37", "R38", "R39", "R40", "R41", "R42",
"R43", "R44", "R45", "R46", "R47", "R48", "R49", "R50", "R51", "R52", "R53",
"R54", "R55", "R56", "R57", "R58", "R59", "R60", "R61", "R62", "R63",
#endif
};
const char* fpu_reg_names[kNumberOfFpuRegisters] = {
"F0",
};
} // namespace dart

16
runtime/vm/constants_dbc.h
View file

@ -1129,20 +1129,8 @@ enum FpuRegister {
const FpuRegister FpuTMP = kFakeFpuRegister;
const intptr_t kNumberOfFpuRegisters = 1;
static const char* cpu_reg_names[kNumberOfCpuRegisters] = {
"R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7", "R8", "R9", "R10",
"R11", "R12", "R13", "R14", "R15", "R16", "R17", "R18", "R19", "R20", "R21",
"R22", "R23", "R24", "R25", "R26", "R27", "R28", "R29", "R30", "R31",
#if defined(ARCH_IS_64_BIT)
"R32", "R33", "R34", "R35", "R36", "R37", "R38", "R39", "R40", "R41", "R42",
"R43", "R44", "R45", "R46", "R47", "R48", "R49", "R50", "R51", "R52", "R53",
"R54", "R55", "R56", "R57", "R58", "R59", "R60", "R61", "R62", "R63",
#endif
};
static const char* fpu_reg_names[kNumberOfFpuRegisters] = {
"F0",
};
extern const char* cpu_reg_names[kNumberOfCpuRegisters];
extern const char* fpu_reg_names[kNumberOfFpuRegisters];
// After a comparison, the condition NEXT_IS_TRUE means the following
// instruction is executed if the comparison is true and skipped over overwise.

6
runtime/vm/constants_ia32.cc
View file

@ -7,6 +7,12 @@
namespace arch_ia32 {
const char* cpu_reg_names[kNumberOfCpuRegisters] = {"eax", "ecx", "edx", "ebx",
"esp", "ebp", "esi", "edi"};
const char* fpu_reg_names[kNumberOfXmmRegisters] = {
"xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7"};
// Although 'kArgumentRegisters' and 'kFpuArgumentRegisters' are both 0, we have
// to give these arrays at least one element to appease MSVC.

7
runtime/vm/constants_ia32.h
View file

@ -57,11 +57,8 @@ const FpuRegister FpuTMP = XMM7;
const int kNumberOfFpuRegisters = kNumberOfXmmRegisters;
const FpuRegister kNoFpuRegister = kNoXmmRegister;
static const char* cpu_reg_names[kNumberOfCpuRegisters] = {
"eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi"};
static const char* fpu_reg_names[kNumberOfXmmRegisters] = {
"xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7"};
extern const char* cpu_reg_names[kNumberOfCpuRegisters];
extern const char* fpu_reg_names[kNumberOfXmmRegisters];
// Register aliases.
const Register TMP = kNoRegister; // No scratch register used by assembler.

8
runtime/vm/constants_x64.cc
View file

@ -7,6 +7,14 @@
namespace arch_x64 {
const char* cpu_reg_names[kNumberOfCpuRegisters] = {
"rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
"r8", "r9", "r10", "r11", "r12", "r13", "thr", "pp"};
const char* fpu_reg_names[kNumberOfXmmRegisters] = {
"xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7",
"xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15"};
#if defined(_WIN64)
const Register CallingConventions::ArgumentRegisters[] = {
CallingConventions::kArg1Reg, CallingConventions::kArg2Reg,

9
runtime/vm/constants_x64.h
View file

@ -94,13 +94,8 @@ const FpuRegister FpuTMP = XMM15;
const int kNumberOfFpuRegisters = kNumberOfXmmRegisters;
const FpuRegister kNoFpuRegister = kNoXmmRegister;
static const char* cpu_reg_names[kNumberOfCpuRegisters] = {
"rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
"r8", "r9", "r10", "r11", "r12", "r13", "thr", "pp"};
static const char* fpu_reg_names[kNumberOfXmmRegisters] = {
"xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7",
"xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15"};
extern const char* cpu_reg_names[kNumberOfCpuRegisters];
extern const char* fpu_reg_names[kNumberOfXmmRegisters];
enum RexBits {
REX_NONE = 0,

7
runtime/vm/instructions_arm64.cc
View file

@ -512,10 +512,9 @@ bool PcRelativeTrampolineJumpPattern::IsValid() const {
const uint32_t adr_mask = (3 << 29) | (((1 << 19) - 1) << 5);
const uint32_t movz_mask = 0xffff << 5;
uint32_t* pattern = reinterpret_cast<uint32_t*>(pattern_start_);
return (pattern[0] & ~adr_mask) == kAdrEncoding &
(pattern[1] & ~movz_mask) == kMovzEncoding &
pattern[2] == kAddTmpTmp2 &&
pattern[3] == kJumpEncoding;
return ((pattern[0] & ~adr_mask) == kAdrEncoding) &&
((pattern[1] & ~movz_mask) == kMovzEncoding) &&
(pattern[2] == kAddTmpTmp2) && (pattern[3] == kJumpEncoding);
#else
UNREACHABLE();
return false;

2
runtime/vm/snapshot.cc
View file

@ -1469,7 +1469,7 @@ Message* MessageWriter::WriteMessage(const Object& obj,
// Setup for long jump in case there is an exception while writing
// the message.
bool has_exception = false;
volatile bool has_exception = false;
{
LongJumpScope jump;
if (setjmp(*jump.Set()) == 0) {

1
runtime/vm/vm_sources.gni
View file

@ -46,6 +46,7 @@ vm_sources = [
"constants_arm.h",
"constants_arm64.cc",
"constants_arm64.h",
"constants_dbc.cc",
"constants_dbc.h",
"constants_ia32.cc",
"constants_ia32.h",