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[vm] Fix errors compiling with GCC.
Change-Id: Ia3127ba9ef4ee1faf1f85a6eaa0dafd0cf187b2b Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/99376 Reviewed-by: Aart Bik <ajcbik@google.com> Reviewed-by: Martin Kustermann <kustermann@google.com> Reviewed-by: Samir Jindel <sjindel@google.com> Commit-Queue: Ryan Macnak <rmacnak@google.com>
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3fd6fa4ff7
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@ -85,7 +85,7 @@ DART_EXPORT intptr_t TakeMinInt16(int16_t x) {
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}
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DART_EXPORT intptr_t TakeMinInt32(int32_t x) {
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const int64_t expected = -(int32_t)0x80000000;
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const int64_t expected = kMinInt32;
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const int64_t received = x;
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return expected == received ? 1 : 0;
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}
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@ -467,7 +467,7 @@ DART_EXPORT double SmallDouble() {
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// truncated.
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DART_EXPORT void* LargePointer() {
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uint64_t origin = 0x8100000082000000;
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return *reinterpret_cast<void**>(&origin);
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return reinterpret_cast<void*>(origin);
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}
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// Allocates 'count'-many Mint boxes, to stress-test GC during an FFI call.
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@ -504,7 +504,8 @@ DART_EXPORT void AllocateThroughDart(uint64_t count) {
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DART_EXPORT int RedirectStderr() {
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char filename[256];
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snprintf(filename, sizeof(filename), "/tmp/captured_stderr_%d", getpid());
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freopen(filename, "w", stderr);
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FILE* f = freopen(filename, "w", stderr);
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ASSERT(f);
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printf("Got file %s\n", filename);
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return getpid();
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}
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@ -3,6 +3,7 @@
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// BSD-style license that can be found in the LICENSE file.
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#include <functional>
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#include <memory>
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#include <utility>
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#include "platform/assert.h"
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@ -7665,10 +7665,10 @@ class BitCastInstr : public TemplateDefinition<1, NoThrow, Pure> {
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from_representation_(from),
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to_representation_(to) {
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ASSERT(from != to);
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ASSERT(to == kUnboxedInt32 && from == kUnboxedFloat ||
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to == kUnboxedFloat && from == kUnboxedInt32 ||
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to == kUnboxedInt64 && from == kUnboxedDouble ||
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to == kUnboxedDouble && from == kUnboxedInt64);
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ASSERT((to == kUnboxedInt32 && from == kUnboxedFloat) ||
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(to == kUnboxedFloat && from == kUnboxedInt32) ||
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(to == kUnboxedInt64 && from == kUnboxedDouble) ||
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(to == kUnboxedDouble && from == kUnboxedInt64));
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SetInputAt(0, value);
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}
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@ -785,7 +785,7 @@ RawCode* CompileParsedFunctionHelper::Compile(CompilationPipeline* pipeline) {
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static RawObject* CompileFunctionHelper(CompilationPipeline* pipeline,
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const Function& function,
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bool optimized,
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volatile bool optimized,
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intptr_t osr_id) {
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ASSERT(!FLAG_precompiled_mode);
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ASSERT(!optimized || function.WasCompiled() || function.ForceOptimize());
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@ -34,7 +34,9 @@ class UnresolvedCall : public IntrusiveDListEntry<UnresolvedCall>,
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offset_into_target(offset_into_target) {}
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UnresolvedCall(const UnresolvedCall& other)
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: caller(other.caller),
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: IntrusiveDListEntry<UnresolvedCall>(),
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IntrusiveDListEntry<UnresolvedCall, 2>(),
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caller(other.caller),
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call_offset(other.call_offset),
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text_offset(other.text_offset),
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callee(other.callee),
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@ -7,6 +7,18 @@
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namespace arch_arm {
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const char* cpu_reg_names[kNumberOfCpuRegisters] = {
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"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
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"r8", "ctx", "pp", "fp", "ip", "sp", "lr", "pc",
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};
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const char* fpu_reg_names[kNumberOfFpuRegisters] = {
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"q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7",
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#if defined(VFPv3_D32)
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"q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15",
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#endif
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};
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const Register CallingConventions::ArgumentRegisters[] = {R0, R1, R2, R3};
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// Although 'kFpuArgumentRegisters' is 0, we have to give this array at least
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@ -265,17 +265,8 @@ const FpuRegister FpuTMP = QTMP;
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const int kNumberOfFpuRegisters = kNumberOfQRegisters;
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const FpuRegister kNoFpuRegister = kNoQRegister;
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static const char* cpu_reg_names[kNumberOfCpuRegisters] = {
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"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
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"r8", "ctx", "pp", "fp", "ip", "sp", "lr", "pc",
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};
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static const char* fpu_reg_names[kNumberOfFpuRegisters] = {
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"q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7",
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#if defined(VFPv3_D32)
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"q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15",
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#endif
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};
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extern const char* cpu_reg_names[kNumberOfCpuRegisters];
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extern const char* fpu_reg_names[kNumberOfFpuRegisters];
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// Register aliases.
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const Register TMP = IP; // Used as scratch register by assembler.
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@ -7,6 +7,18 @@
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namespace arch_arm64 {
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const char* cpu_reg_names[kNumberOfCpuRegisters] = {
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"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10",
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"r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19", "r20", "r21",
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"r22", "r23", "r24", "ip0", "ip1", "pp", "ctx", "fp", "lr", "r31",
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};
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const char* fpu_reg_names[kNumberOfFpuRegisters] = {
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"v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10",
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"v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21",
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"v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31",
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};
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const Register CallingConventions::ArgumentRegisters[] = {
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R0, R1, R2, R3, R4, R5, R6, R7,
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};
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@ -108,17 +108,8 @@ const FpuRegister FpuTMP = VTMP;
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const int kNumberOfFpuRegisters = kNumberOfVRegisters;
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const FpuRegister kNoFpuRegister = kNoVRegister;
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static const char* cpu_reg_names[kNumberOfCpuRegisters] = {
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"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10",
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"r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19", "r20", "r21",
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"r22", "r23", "r24", "ip0", "ip1", "pp", "ctx", "fp", "lr", "r31",
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};
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static const char* fpu_reg_names[kNumberOfFpuRegisters] = {
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"v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10",
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"v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21",
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"v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31",
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};
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extern const char* cpu_reg_names[kNumberOfCpuRegisters];
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extern const char* fpu_reg_names[kNumberOfFpuRegisters];
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// Register aliases.
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const Register TMP = R16; // Used as scratch register by assembler.
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25
runtime/vm/constants_dbc.cc
Normal file
25
runtime/vm/constants_dbc.cc
Normal file
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@ -0,0 +1,25 @@
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// Copyright (c) 2019, the Dart project authors. Please see the AUTHORS file
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// for details. All rights reserved. Use of this source code is governed by a
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// BSD-style license that can be found in the LICENSE file.
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#define RUNTIME_VM_CONSTANTS_H_ // To work around include guard.
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#include "vm/constants_dbc.h"
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namespace dart {
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const char* cpu_reg_names[kNumberOfCpuRegisters] = {
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"R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7", "R8", "R9", "R10",
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"R11", "R12", "R13", "R14", "R15", "R16", "R17", "R18", "R19", "R20", "R21",
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"R22", "R23", "R24", "R25", "R26", "R27", "R28", "R29", "R30", "R31",
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#if defined(ARCH_IS_64_BIT)
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"R32", "R33", "R34", "R35", "R36", "R37", "R38", "R39", "R40", "R41", "R42",
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"R43", "R44", "R45", "R46", "R47", "R48", "R49", "R50", "R51", "R52", "R53",
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"R54", "R55", "R56", "R57", "R58", "R59", "R60", "R61", "R62", "R63",
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#endif
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};
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const char* fpu_reg_names[kNumberOfFpuRegisters] = {
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"F0",
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};
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} // namespace dart
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@ -1129,20 +1129,8 @@ enum FpuRegister {
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const FpuRegister FpuTMP = kFakeFpuRegister;
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const intptr_t kNumberOfFpuRegisters = 1;
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static const char* cpu_reg_names[kNumberOfCpuRegisters] = {
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"R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7", "R8", "R9", "R10",
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"R11", "R12", "R13", "R14", "R15", "R16", "R17", "R18", "R19", "R20", "R21",
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"R22", "R23", "R24", "R25", "R26", "R27", "R28", "R29", "R30", "R31",
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#if defined(ARCH_IS_64_BIT)
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"R32", "R33", "R34", "R35", "R36", "R37", "R38", "R39", "R40", "R41", "R42",
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"R43", "R44", "R45", "R46", "R47", "R48", "R49", "R50", "R51", "R52", "R53",
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"R54", "R55", "R56", "R57", "R58", "R59", "R60", "R61", "R62", "R63",
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#endif
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};
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static const char* fpu_reg_names[kNumberOfFpuRegisters] = {
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"F0",
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};
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extern const char* cpu_reg_names[kNumberOfCpuRegisters];
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extern const char* fpu_reg_names[kNumberOfFpuRegisters];
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// After a comparison, the condition NEXT_IS_TRUE means the following
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// instruction is executed if the comparison is true and skipped over overwise.
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@ -7,6 +7,12 @@
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namespace arch_ia32 {
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const char* cpu_reg_names[kNumberOfCpuRegisters] = {"eax", "ecx", "edx", "ebx",
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"esp", "ebp", "esi", "edi"};
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const char* fpu_reg_names[kNumberOfXmmRegisters] = {
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"xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7"};
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// Although 'kArgumentRegisters' and 'kFpuArgumentRegisters' are both 0, we have
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// to give these arrays at least one element to appease MSVC.
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@ -57,11 +57,8 @@ const FpuRegister FpuTMP = XMM7;
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const int kNumberOfFpuRegisters = kNumberOfXmmRegisters;
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const FpuRegister kNoFpuRegister = kNoXmmRegister;
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static const char* cpu_reg_names[kNumberOfCpuRegisters] = {
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"eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi"};
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static const char* fpu_reg_names[kNumberOfXmmRegisters] = {
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"xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7"};
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extern const char* cpu_reg_names[kNumberOfCpuRegisters];
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extern const char* fpu_reg_names[kNumberOfXmmRegisters];
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// Register aliases.
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const Register TMP = kNoRegister; // No scratch register used by assembler.
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@ -7,6 +7,14 @@
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namespace arch_x64 {
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const char* cpu_reg_names[kNumberOfCpuRegisters] = {
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"rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
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"r8", "r9", "r10", "r11", "r12", "r13", "thr", "pp"};
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const char* fpu_reg_names[kNumberOfXmmRegisters] = {
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"xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7",
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"xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15"};
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#if defined(_WIN64)
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const Register CallingConventions::ArgumentRegisters[] = {
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CallingConventions::kArg1Reg, CallingConventions::kArg2Reg,
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@ -94,13 +94,8 @@ const FpuRegister FpuTMP = XMM15;
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const int kNumberOfFpuRegisters = kNumberOfXmmRegisters;
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const FpuRegister kNoFpuRegister = kNoXmmRegister;
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static const char* cpu_reg_names[kNumberOfCpuRegisters] = {
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"rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
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"r8", "r9", "r10", "r11", "r12", "r13", "thr", "pp"};
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static const char* fpu_reg_names[kNumberOfXmmRegisters] = {
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"xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7",
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"xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15"};
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extern const char* cpu_reg_names[kNumberOfCpuRegisters];
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extern const char* fpu_reg_names[kNumberOfXmmRegisters];
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enum RexBits {
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REX_NONE = 0,
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@ -512,10 +512,9 @@ bool PcRelativeTrampolineJumpPattern::IsValid() const {
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const uint32_t adr_mask = (3 << 29) | (((1 << 19) - 1) << 5);
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const uint32_t movz_mask = 0xffff << 5;
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uint32_t* pattern = reinterpret_cast<uint32_t*>(pattern_start_);
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return (pattern[0] & ~adr_mask) == kAdrEncoding &
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(pattern[1] & ~movz_mask) == kMovzEncoding &
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pattern[2] == kAddTmpTmp2 &&
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pattern[3] == kJumpEncoding;
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return ((pattern[0] & ~adr_mask) == kAdrEncoding) &&
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((pattern[1] & ~movz_mask) == kMovzEncoding) &&
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(pattern[2] == kAddTmpTmp2) && (pattern[3] == kJumpEncoding);
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#else
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UNREACHABLE();
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return false;
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@ -1469,7 +1469,7 @@ Message* MessageWriter::WriteMessage(const Object& obj,
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// Setup for long jump in case there is an exception while writing
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// the message.
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bool has_exception = false;
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volatile bool has_exception = false;
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{
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LongJumpScope jump;
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if (setjmp(*jump.Set()) == 0) {
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@ -46,6 +46,7 @@ vm_sources = [
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"constants_arm.h",
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"constants_arm64.cc",
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"constants_arm64.h",
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"constants_dbc.cc",
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"constants_dbc.h",
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"constants_ia32.cc",
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"constants_ia32.h",
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