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Merge branch 'bc/block-sha1-without-gcc-asm-extension'

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Get rid of one use of __asm__() GCC extension that does not help us
much these days, which has an added advantage of not having to
worry about -pedantic complaining.

* bc/block-sha1-without-gcc-asm-extension:
  block-sha1: remove use of obsolete x86 assembly
This commit is contained in:
Junio C Hamano 2022-03-23 14:09:29 -07:00
parent 7649bfbaa2 544d93bc3b
commit dc2588b2ba
1 changed files with 0 additions and 17 deletions
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17
block-sha1/sha1.c
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@ -11,27 +11,10 @@
#include "sha1.h"
#if defined(__GNUC__) && (defined(__i386__) || defined(__x86_64__))
/*
* Force usage of rol or ror by selecting the one with the smaller constant.
* It _can_ generate slightly smaller code (a constant of 1 is special), but
* perhaps more importantly it's possibly faster on any uarch that does a
* rotate with a loop.
*/
#define SHA_ASM(op, x, n) ({ unsigned int __res; __asm__(op " %1,%0":"=r" (__res):"i" (n), "0" (x)); __res; })
#define SHA_ROL(x,n) SHA_ASM("rol", x, n)
#define SHA_ROR(x,n) SHA_ASM("ror", x, n)
#else
#define SHA_ROT(X,l,r) (((X) << (l)) | ((X) >> (r)))
#define SHA_ROL(X,n) SHA_ROT(X,n,32-(n))
#define SHA_ROR(X,n) SHA_ROT(X,32-(n),n)
#endif
/*
* If you have 32 registers or more, the compiler can (and should)
* try to change the array[] accesses into registers. However, on