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t7406 & t7407: add missing && at end of lines

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Signed-off-by: Jens Lehmann <Jens.Lehmann@web.de>
Signed-off-by: Junio C Hamano <gitster@pobox.com>
This commit is contained in:
Jens Lehmann 2010-09-01 23:28:27 +02:00 committed by Junio C Hamano
parent 1e2847634e
commit 4bf9dd9782
2 changed files with 3 additions and 3 deletions
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2
t/t7406-submodule-update.sh
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@ -25,7 +25,7 @@ test_expect_success 'setup a submodule tree' '
echo file > file &&
git add file &&
test_tick &&
git commit -m upstream
git commit -m upstream &&
git clone . super &&
git clone super submodule &&
git clone super rebasing &&

4
t/t7407-submodule-foreach.sh
View file

@ -16,7 +16,7 @@ test_expect_success 'setup a submodule tree' '
echo file > file &&
git add file &&
test_tick &&
git commit -m upstream
git commit -m upstream &&
git clone . super &&
git clone super submodule &&
(
@ -30,7 +30,7 @@ test_expect_success 'setup a submodule tree' '
submodule.sub2 submodule.foo2 &&
git config -f .gitmodules --rename-section \
submodule.sub3 submodule.foo3 &&
git add .gitmodules
git add .gitmodules &&
test_tick &&
git commit -m "submodules" &&
git submodule init sub1 &&