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Makefile: use $(OBJECTS) instead of $(C_OBJ)
In the preceding commit $(C_OBJ) added in c373991375
(Makefile: list
generated object files in OBJECTS, 2010-01-26) became synonymous with
$(OBJECTS). Let's avoid the indirection and use the $(OBJECTS)
variable directly instead.
Signed-off-by: Ævar Arnfjörð Bjarmason <avarab@gmail.com>
Signed-off-by: Junio C Hamano <gitster@pobox.com>
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parent
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6
Makefile
6
Makefile
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@ -2590,9 +2590,7 @@ missing_compdb_dir =
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compdb_args =
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endif
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C_OBJ := $(OBJECTS)
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$(C_OBJ): %.o: %.c GIT-CFLAGS $(missing_dep_dirs) $(missing_compdb_dir)
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$(OBJECTS): %.o: %.c GIT-CFLAGS $(missing_dep_dirs) $(missing_compdb_dir)
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$(QUIET_CC)$(CC) -o $*.o -c $(dep_args) $(compdb_args) $(ALL_CFLAGS) $(EXTRA_CPPFLAGS) $<
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%.s: %.c GIT-CFLAGS FORCE
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@ -3084,7 +3082,7 @@ t/helper/test-%$X: t/helper/test-%.o GIT-LDFLAGS $(GITLIBS) $(REFTABLE_TEST_LIB)
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check-sha1:: t/helper/test-tool$X
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t/helper/test-sha1.sh
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SP_OBJ = $(patsubst %.o,%.sp,$(C_OBJ))
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SP_OBJ = $(patsubst %.o,%.sp,$(OBJECTS))
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$(SP_OBJ): %.sp: %.c %.o
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$(QUIET_SP)cgcc -no-compile $(ALL_CFLAGS) $(EXTRA_CPPFLAGS) \
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