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40 lines
1.3 KiB
Plaintext
40 lines
1.3 KiB
Plaintext
# sleigh specification file for Skeleton Processor
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# >> see docs/languages/sleigh.htm or sleigh.pdf for Sleigh syntax
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# Other language modules (see Ghidra/Processors) may provide better examples
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# when creating a new language module.
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define endian=little;
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define alignment=1;
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define space ram type=ram_space size=2 default;
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define space io type=ram_space size=2;
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define space register type=register_space size=1;
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define register offset=0x00 size=1 [ F A C B E D L H I R ];
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define register offset=0x00 size=2 [ AF BC DE HL ];
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define register offset=0x20 size=1 [ A_ F_ B_ C_ D_ E_ H_ L_ ]; # Alternate registers
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define register offset=0x20 size=2 [ AF_ BC_ DE_ HL_ ]; # Alternate registers
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define register offset=0x40 size=2 [ _ PC SP IX IY ];
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define register offset=0x50 size=1 [ rCBAR rCBR rBBR ];
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# Define context bits (if defined, size must be multiple of 4-bytes)
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define register offset=0xf0 size=4 contextreg;
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define context contextreg
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assume8bitIOSpace = (0,0)
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;
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# Flag bits (?? manual is very confusing - could be typos!)
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@define C_flag "F[0,1]" # C: Carry
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@define N_flag "F[1,1]" # N: Add/Subtract
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@define PV_flag "F[2,1]" # PV: Parity/Overflow
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@define H_flag "F[4,1]" # H: Half Carry
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@define Z_flag "F[6,1]" # Z: Zero
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@define S_flag "F[7,1]" # S: Sign
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# Include contents of skel.sinc file
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@include "skel.sinc"
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