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Merge 5963669eac into 93eed8011c

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Brian Wright 2024-06-28 08:45:26 -04:00 committed by GitHub
commit fea7544703
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39
Ghidra/Processors/ARM/data/languages/ARMTHUMBinstructions.sinc
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@ -2858,6 +2858,45 @@ control: "control" is epsilon {}
Rd0811 = zext((altStackMode << 1) | notPrivileged);
}
@endif
@if defined(CORTEX)
define pcodeop setMainStackPointerLimit;
msplim: "msplim" is epsilon {}
:msr^ItCond msplim,Rn0003 is TMode=1 & ItCond & op4=0xf38 & Rn0003; op12=0x8 & th_psrmask=8 & sysm=10 & msplim
{
build ItCond;
setMainStackPointerLimit(Rn0003);
}
define pcodeop setProcStackPointerLimit;
psplim: "psplim" is epsilon {}
:msr^ItCond psplim,Rn0003 is TMode=1 & ItCond & op4=0xf38 & Rn0003; op12=0x8 & th_psrmask=8 & sysm=11 & psplim
{
build ItCond;
setProcStackPointerLimit(Rn0003);
}
define pcodeop getMainStackPointerLimit;
:mrs^ItCond Rd0811,msplim is TMode=1 & ItCond & op0=0xf3ff; op12=0x8 & Rd0811 & sysm=10 & msplim
{
build ItCond;
Rd0811 = getMainStackPointerLimit();
}
define pcodeop getProcessStackPointerLimit;
:mrs^ItCond Rd0811,psplim is TMode=1 & ItCond & op0=0xf3ff; op12=0x8 & Rd0811 & sysm=11 & psplim
{
build ItCond;
Rd0811 = getProcessStackPointerLimit();
}
@endif
:mrs^ItCond Rd0811,cpsr is TMode=1 & ItCond & op0=0xf3ef; op12=0x8 & Rd0811 & sysm=0 & cpsr