mirror of
https://github.com/NationalSecurityAgency/ghidra
synced 2024-09-19 10:11:55 +00:00
Cleaning up warnings and errors, mostly looking for:
temporary is written but not read in constructor
This commit is contained in:
parent
6ae0c1ce23
commit
dce6e9f6a8
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@ -628,7 +628,9 @@ DIRECT: imm8 is imm8 { export *:1 imm8; }
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*:1 SP = X;
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SP=SP-1;
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*:1 SP = A;
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tmp:1 = (H << 4) | (I << 3) | (N << 2) | ( Z << 1) | C;
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tmp:1 = 0b11100000 | (H << 4) | (I << 3) | (N << 2) | ( Z << 1) | C;
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SP=SP-1;
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*:1 SP = tmp;
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I = 1;
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call [SWI_VECTOR];
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}
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@ -18,7 +18,7 @@ puls5: puls4" "Y is Y & imm85=1 & puls4 { Pull2(S, Y); }
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puls5: puls4 is imm85=0 & puls4 { }
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puls6: puls5" "U is U & imm86=1 & puls5 { Pull2(S, U); }
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puls6: puls5 is imm86=0 & puls5 { }
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puls7: puls6" "PC is PC & imm87=1 & puls6 { local t:2 = inst_next; Pull2(S, t); }
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puls7: puls6" "PC is PC & imm87=1 & puls6 { local t:2 = 0; Pull2(S, t); goto [t]; }
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puls7: puls6 is imm87=0 & puls6 { }
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:PULS puls7 is op=0x35; puls7 { }
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@ -41,7 +41,7 @@ pulu5: pulu4" "Y is Y & imm85=1 & pulu4 { Pull2(U, Y); }
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pulu5: pulu4 is imm85=0 & pulu4 { }
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pulu6: pulu5" "S is S & imm86=1 & pulu5 { Pull2(U, S); }
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pulu6: pulu5 is imm86=0 & pulu5 { }
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pulu7: pulu6" "PC is PC & imm87=1 & pulu6 { local t:2 = inst_next; Pull2(U, t); }
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pulu7: pulu6" "PC is PC & imm87=1 & pulu6 { local t:2 = 0; Pull2(U, t); goto [t]; }
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pulu7: pulu6 is imm87=0 & pulu6 { }
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:PULU pulu7 is op=0x37; pulu7 { }
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@ -199,7 +199,7 @@ macro xch(node1, node2) {
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}
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@ifdef SINGLE_REGISTER_BANK
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macro regbank(r) { }
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macro regbank(r) { r = r; }
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macro setbank(bs) {
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BS = bs;
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local tmp:1 = bs;
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@ -573,7 +573,7 @@ macro pop24(val) {
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:PUSH drk47 is $(GROUP3) & ophi=12 & oplo=10; $(DRK47) & s03=11 { push16(drk47); }
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# SETB bit
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:SETB xBitAddr^"."^xBitByteAddr is $(GROUP3) & ophi=10 & oplo=9; (d47=13 & s3=0 & bit02; xBitByteAddr) & xBitAddr { xBitBtyteAddr:1 = (xBitByteAddr) | (1 << bit02); }
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:SETB xBitAddr^"."^xBitByteAddr is $(GROUP3) & ophi=10 & oplo=9; (d47=13 & s3=0 & bit02; xBitByteAddr) & xBitAddr { xBitByteAddr = (xBitByteAddr) | (1 << bit02); }
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# SLL Rm
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:SLL rm47 is $(GROUP3) & ophi=3 & oplo=14; rm47 & s03=0 { $(CY) = ((rm47>>7) & 1); rm47 = rm47 << 1; resultflags(rm47); }
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@ -360,14 +360,16 @@ macro push8(val) {
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#tmp:3 = zext(SP) + $(STACKBASE);
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tmp:3 = SP;
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*[RAM]:1 tmp = val;
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@else
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val = val;
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@endif
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}
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@ifdef OMIT_RETADDR
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@ifdef MCS80390
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macro push24(val) { }
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macro push24(val) { val = val; }
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@else
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macro push16(val) { }
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macro push16(val) { val = val; }
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@endif
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@else
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@ -404,6 +406,8 @@ macro push16(val) {
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*[RAM]:1 SP = al;
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SP = SP + 1;
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*[RAM]:1 SP = ah;
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@else
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val = val;
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@endif
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}
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@else
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@ -436,12 +440,14 @@ macro pop8(val) {
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ptr:3 = SP;
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val = *[RAM]:1 ptr;
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SP = SP - 1;
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@else
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val = val;
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@endif
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}
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@if defined(MCS80390)
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@ifdef OMIT_RETADDR
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macro pop24(val) { }
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macro pop24(val) { val = val; }
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@else
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macro pop24(val) {
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ptr:1 = SP - 2;
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@ -460,7 +466,7 @@ macro pop24(val) {
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@endif
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@else
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@ifdef OMIT_RETADDR
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macro pop16(val) { }
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macro pop16(val) { val = val; }
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@else
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macro pop16(val) {
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@if defined(MCS251)
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@ -489,6 +495,8 @@ macro pop16(val) {
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SP = SP - 1;
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val = (zext(ah) << 8) | zext(al);
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@else
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val = val;
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@endif
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}
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@endif
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@ -31,8 +31,8 @@ PRi: PRi_revend is PRi_sel=1 & PRi_revend { tmp:3 = (zext(R7) << 16) | (zext(R6)
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####################
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@ifdef OMIT_RETADDR
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macro push24(val) { }
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macro pop24(val) { }
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macro push24(val) { val = val; }
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macro pop24(val) { val = val; }
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@else
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# stack grows up.
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@ -373,7 +373,7 @@ cc: "M" is bits3_3=0x7 { export S_flag;
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val:1 = *:1 HL;
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setSubtractFlags(A,val);
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cmp:1 = A - val;
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setResultFlags(val);
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setResultFlags(cmp);
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}
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:INR reg3_3 is op6_2=0x0 & reg3_3 & bits0_3=0x4 {
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@ -423,20 +423,20 @@ simdExpImmDT: "i64" is TMode=1 & thv_c0811=14 & thv_c0505=1 { }
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simdExpImmDT: "f32" is TMode=1 & thv_c0811=15 & thv_c0505=0 { }
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macro replicate1to8(bytes, dest) {
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val:8 = zext(bytes);
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local val:8 = zext(bytes);
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val = val | (val << 8);
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val = val | (val << 16);
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dest = val | (val << 32);
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}
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macro replicate2to8(bytes, dest) {
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val:8 = zext(bytes);
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local val:8 = zext(bytes);
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val = val | (val << 16);
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dest = val | (val << 32);
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}
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macro replicate4to8(bytes, dest) {
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val:8 = zext(bytes);
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local val:8 = zext(bytes);
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dest = val | (val << 32);
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}
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@ -3745,24 +3745,30 @@ define pcodeop VectorShiftNarrowRight;
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vst1Dd: Dreg is Dreg & c0607=0
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{
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local tmpDreg = Dreg;
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val:1 = tmpDreg:1;
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replicate1to8(val, *:8 mult_addr);
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local val:1 = tmpDreg:1;
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local tmp8:8 = 0;
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replicate1to8(val, tmp8);
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*:8 mult_addr = tmp8;
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}
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vst1Dd: Dreg is Dreg & c0607=1
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{
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local tmpDreg = Dreg;
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val:2 = tmpDreg:2;
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replicate2to8(val, *:8 mult_addr);
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local val:2 = tmpDreg:2;
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local tmp8:8 = 0;
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replicate2to8(val, tmp8);
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*:8 mult_addr = tmp8;
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}
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vst1Dd: Dreg is Dreg & c0607=2
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{
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local tmpDreg = Dreg;
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val:4 = tmpDreg:4;
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replicate4to8(val, *:8 mult_addr);
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local val:4 = tmpDreg:4;
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local tmp8:8 = 0;
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replicate4to8(val, tmp8);
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*:8 mult_addr = tmp8;
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}
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vst1Dd: Dreg is Dreg & c0607=3
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{
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*:8 mult_addr = Dreg;
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*:8 mult_addr = Dreg;
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}
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buildVst1DdList: is counter=0 { }
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thv_vst1Dd: Dreg is Dreg & thv_c0607=0
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{
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local tmpDreg = Dreg;
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val:1 = tmpDreg:1;
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replicate1to8(val, *:8 mult_addr);
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local val:1 = tmpDreg:1;
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local tmp8:8 = 0;
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replicate1to8(val, tmp8);
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*:8 mult_addr = tmp8;
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}
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thv_vst1Dd: Dreg is Dreg & thv_c0607=1
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{
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local tmpDreg = Dreg;
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val:2 = tmpDreg:2;
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replicate2to8(val, *:8 mult_addr);
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local val:2 = tmpDreg:2;
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local tmp8:8 = 0;
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replicate2to8(val, tmp8);
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*:8 mult_addr = tmp8;
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}
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thv_vst1Dd: Dreg is Dreg & thv_c0607=2
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{
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local tmpDreg = Dreg;
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val:4 = tmpDreg:4;
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replicate4to8(val, *:8 mult_addr);
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local val:4 = tmpDreg:4;
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local tmp8:8 = 0;
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replicate4to8(val, tmp8);
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*:8 mult_addr = tmp8;
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}
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thv_vst1Dd: Dreg is Dreg & thv_c0607=3
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{
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@ -682,10 +682,12 @@ define pcodeop break;
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:cpc RdFull,RrFull is phase=1 & ophi6=0x1 & RdFull & RrFull {
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local res = 0;
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doSubtractWithCarry(RdFull,RrFull,res);
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res = res; # avoid warning
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}
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:cpi RdHi,K8 is phase=1 & ophi4=0x3 & RdHi & K8 {
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local res = 0;
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doSubtract(RdHi,K8,res);
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res = res; # avoid warning
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}
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@ifdef FUSION
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@ -806,7 +806,8 @@ define pcodeop switchAssist;
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:packed_switch registerA8,B_BITS_0_31_S is inst0=0x2b ; registerA8 ; B_BITS_0_31_S
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{
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distance:4 = B_BITS_0_31_S * 2;
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ident:4 = *[ram] ( inst_start + distance );
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# ident:2 = *[ram] ( inst_start + distance );
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# if (ident != 0x0100) goto inst_next;
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size2:2 = *[ram] ( inst_start + distance + 2 );
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sze:4 = zext( size2 );
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first_key:4 = *[ram] ( inst_start + distance + 2 + 2 );
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@ -1218,6 +1218,7 @@ cc: "E" is cond=15 { tmp:1 = ($(Z) == 1); export tmp; }
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:SKIP is op8=0x00 {
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local tmp:1 = 0;
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tmp = tmp; # avoid warning
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} #2-byte NOP
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:ST wreg, oper16 is op6=0x30 ... & oper16; wreg {
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@ -28,7 +28,6 @@ define pcodeop mipsFloatPS;
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# 0100 01ff ffft tttt ssss sddd dd00 0000
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:add.S fd, fs, ft is $(AMODE) & prime=17 & fct=0 & fmt1 & format=0x10 & ft & fs & fd {
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fd_tmp:4 = fs:4 f+ ft:4;
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fd[0,32] = fs:4 f+ ft:4;
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}
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:add.D fd, fs, ft is $(AMODE) & prime=17 & fct=0 & fmt1 & format=0x11 & ft & fs & fd & ftD & fsD & fdD {
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@ -53,7 +52,7 @@ define pcodeop mipsFloatPS;
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# 0100 01ff fff0 0000 ssss sddd dd00 1110
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:ceil.w.S fd, fs is $(AMODE) & prime=0x11 & ft=0x0 & fct=0x0E & fmt2 & fd & fs & format=0x10 {
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fs_ceil_tmp:4 = ceil(fs:4); # Note that ceil returns a float the same size as its argument
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fd[0,32] = trunc( ceil(fs:4) );
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fd[0,32] = trunc(fs_ceil_tmp);
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}
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:ceil.w.D fd, fs is $(AMODE) & prime=0x11 & ft=0x0 & fct=0x0E & fmt2 & fd & fs & format=0x11 & fsD {
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fs_tmp:8 = ceil(fsD); # Note that ceil returns a float the same size as its argument
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@ -139,8 +139,8 @@ macro setSubtractCFlags(op1,op2) {
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macro setSubtractFlags(op1,op2) {
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# op1 and op2 are assumed to be 8-bit values
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# NOTE: carry flag is SET if there is NO borrow
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C = (op1 >= op2);
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DC = ((op1<<4) < (op2<<4));
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$(C) = (op1 >= op2);
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$(DC) = ((op1<<4) < (op2<<4));
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}
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macro push(val) { # TODO: Uncertain about this !!
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@ -890,17 +890,16 @@ srcFSRk: sk6"["fsrk"]" is fsrk & sk6 {
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:SUBWFB srcREG, D is op6=0x3b & srcREG & D & destREG {
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val:1 = srcREG;
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bor:1 = !$(C);
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setSubtractFlags(val, W);
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setSubtractFlags(val, W);
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val = val - W;
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tb:1 = $(C);
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setSubtractFlags(val,bor);
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# first subtraction could cause borrow
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$(C) = $(C) & tb; # borrow if C not set
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$(C) = $(C) & tb; # borrow if C not set
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val = val - bor;
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setResultFlags(val);
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destREG = val;
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}
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@ -1,7 +1,7 @@
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#dcread r0,0,r0 0x7c 00 03 cc
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:dcread S,RA_OR_ZERO,B is OP=31 & S & B & (XOP_1_10=486 | XOP_1_10=326) & BIT_0=0 & RA_OR_ZERO
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{
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ea:$(REGISTER_SIZE) = RA_OR_ZERO + B;
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# ea:$(REGISTER_SIZE) = RA_OR_ZERO + B;
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S = dataCacheRead(RA_OR_ZERO,B);
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}
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@ -834,7 +834,6 @@ define pcodeop DetermineLeftmostZeroByte;
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@endif
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tmpX:8 = 0;
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tmpY:8 = 0;
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<unmatched>
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@ -843,9 +842,6 @@ define pcodeop DetermineLeftmostZeroByte;
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if ( ( ( tmpD << ( (tmpX - 1) * 8 ) ) & 0xFF00000000000000 ) != 0 ) goto <unmatched>;
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# matched
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tmpY = 1;
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<done_searching>
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# place byte number in register A and low 7 bits of XER
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@ -1623,7 +1623,7 @@ define pcodeop InvalidateCacheBlock;
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:icbi N_0t_at1 is OP_0=0x0 & N_0t_at1 & OP_4=0xe3 {
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tmp:4 = N_0t_at1;
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InvalidateCacheBlock(N_0t_at1);
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InvalidateCacheBlock(tmp);
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}
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# Unconditional Branch
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@ -2374,7 +2374,7 @@ define pcodeop mac_wOp;
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temp:4 = -M_0t;
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N_0t = temp - zext($(T_FLAG));
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$(T_FLAG) = ( 0 < temp );
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$(T_FLAG) = ( 0 != temp );
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if ( temp >= N_0t ) goto <skip>;
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$(T_FLAG) = 1;
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<skip>
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